Review of cryogenic neuromorphic hardware

Md Mazharul Islam¹, Shamiul Alam¹, Md Shafayat Hossain³, Kaushik Roy³, 

and Ahmedullah Aziz¹,

A review of cryogenic neuromorphic hardware

Journal of Applied Physics 133, no. 7 (2023): 070701

DOI: 10.1063/5.0133515

1Department of Electrical Engineering and Computer Science, University of Tennessee, Knoxville, Tennessee 37996, USA
2Department of Physics, Princeton University, Princeton, New Jersey 08544, USA
3Department of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47906, USA

ABSTRACT: The revolution in artificial intelligence (AI) brings up an enormous storage and data processing requirement. Large power consumption and hardware overhead have become the main challenges for building next-generation AI hardware. To mitigate this, neuromorphic computing has drawn immense attention due to its excellent capability for data processing with very low power consumption. While relentless research has been underway for years to minimize the power consumption in neuromorphic hardware, we are still a long way off from reaching the energy efficiency of the human brain. Furthermore, design complexity and process variation hinder the large-scale implementation of current neuromorphic platforms. Recently, the concept of implementing neuromorphic computing systems in cryogenic temperature has garnered intense interest thanks to their excellent speed and power metric. Several cryogenic devices can be engineered to work as neuromorphic primitives with ultra-low demand for power. Here, we comprehensively review the cryogenic neuromorphic hardware. We classify the existing cryogenic neuromorphic hardware into several hierarchical categories and sketch a comparative analysis based on key performance metrics. Our analysis concisely describes the operation of the associated circuit topology and outlines the advantages and challenges encountered by the state-of-the-art technology platforms. Finally, we provide insight to circumvent these challenges for the future progression of research.

FIG: (a) Biological neuron connected with multiple neurons through synapses. The inset shows the transportation of the neurotransmitter. (b) Electronic model of a neuromorphic system showing the integration of weighted spikes. (c) Several conventional hardware platforms. (d) Several cryogenic platforms for neuromorphic hardware. (e) Input spikes (Vin), corresponding membrane potential (Vmem), and output spike (Vout) of a leaky integrating and fire (LIF) neuron. An output spike is generated after Vmem crosses the threshold voltage (Vth). (f) Switching speed and switching energy comparison of conventional and cryogenic hardware.

[Book] More-than-Moore Devices and Integration for Semiconductors

More-than-Moore Devices and Integration

for Semiconductors

Editors: Francesca Iacopi and Francis Balestra

Publisher: Springer Cham

DOI: 10.1007/978-3-031-21610-7

This book provides readers with a comprehensive, state-of-the-art reference for miniaturized More-than-Moore systems with a broad range of functionalities that can be added to 3D microsystems, including flexible electronics, metasurfaces and power sources. The book also includes examples of applications for brain-computer interfaces and event-driven imaging systems.

• Provides a comprehensive, state-of-the-art reference for miniaturized More-than-Moore systems;
• Covers functionalities to add to 3D microsystems, including flexible electronics, metasurfaces and power sources;
• Includes current applications, such as brain-computer interfaces, event - driven imaging and edge computing.

Table of contents (7 chapters)

• Front Matter Pages i-xiv
• Energy Harvesters and Power Management Pages 1-45
  Michail E. Kiziroglou, Eric M. Yeatman
• SiC and GaN Power Devices Pages 47-104
  Konstantinos Zekentes, Victor Veliadis, Sei-Hyung Ryu, Konstantin Vasilevskiy, Spyridon Pavlidis, Arash Salemi et al.
• Flexible and Printed Electronics Pages 105-125
  Benjamin Iñiguez
• Terahertz Metasurfaces, Metawaveguides, and Applications Pages 127-156
  Wendy S. L. Lee, Shaghik Atakaramians, Withawat Withayachumnankul
• Mechanical Robustness of Patterned Structures and Failure Mechanisms
  Ehrenfried Zschech, Maria Reyes Elizalde Pages 157-189
• Neuromorphic Computing for Compact LiDAR Systems Pages 191-240
  Dennis Delic, Saeed Afshar
• Integrated Sensing Devices for Brain-Computer Interfaces Pages 241-258
  Tien-Thong Nguyen Do, Ngoc My Hanh Duong, Chin-Teng Lin

Acknowledgements: We would like to thank the following colleagues for their help in peer-reviewing this book’s material: Dr. Yang Yang and Dr. Diep Nguyen (University of Technology Sydney, Australia); Prof. Xuan-Tu Tran (Vietnam National University Hanoi), Prof. Gustavo Ardila and Prof. Pascal Xavier (University Grenoble Alpes, France); and Prof. Edwige Bano (Grenoble INP, France). FI would also like to acknowledge support from the Australian Research Council Centre of Excellence in Transformative MetaOptical Systems (TMOS, CE200100010).

Francesca Iacopi, Ultimo, NSW, Australia 

Francis Balestra, Grenoble, France 

2022 SSCS Outstanding Chapter Award

Our SSCS Switzerland Chapter, with Prof. Taekwang Jang as its Chair, was recognized as the outstanding chapter of the year 2022. Dear my fellow Swiss colleagues, the chapter offering the best lectures, seminars, and social events is right at your next door, and you can enjoy them by joining the IEEE SSCS members here.

[C4P] T-ED Special Issue

Call for Papers - Special Issue on "Wide and Ultrawide Band Gap Semiconductor Devices for RF and Power Applications."

The Special Issue of the IEEE Transactions on Electron Devices (T-ED) will report the most advanced and recent results in the field of wide and ultrawide bandgap semiconductor materials and devices, including papers focused on material fabrication, device processing, reliability investigation, device modeling, thermal aspects, and system-related results.

Submission deadline: 31 August 2023
Publication date: February 2024

Submit papers today: https://bit.ly/3fESTgZ

Guest Editors: 

Prof. Matteo Meneghini, University of Padova, Italy 

Prof. Patrick Fay, University of Notre Dame, USA 

Prof. Digbijoy Nath, IISC Bangalore 

Prof. Geok Ing Ng, Nanyang Technical University, Singapore 

Prof. Junxia Shi, University of Illinois, Chicago 

Prof. Shyh-Chiang Shen, Georgia Tech. 

FOSS Verilog-A Models Repository

Dietmar Warning, ngspice team, has announced his new github project VA-Models repository 
<https://github.com/dwarning/VA-Models>

These Verilog-A model code repository is a compilation of the most important models in the state of public FOSS availability. The intention is to have one place for model access and a platform for discussion and integration into simulators.

At the moment, the models will be compiled by script with openVAF and checked with ngspice version 39. Code changes are introduced only for convergence support or to fulfill Verilog-A language standard requirements. Model equations are untouched. But I am open to integrate code modifications for other compiler/simulator companions as far they are inline with actual LRM 2.4. Simple test case are provided, mainly to show general functionality of the compiled models. 

Don't hesitate to contact Dietmar Warning, ngspice team, if there is something wrong, especially in kind of legal aspects. All the contributions are welcome.