Modeling networks of probabilistic memristors in SPICE
Vincent J. Dowling1, Valeriy A. Slipko2, Yuriy V. Pershin1
arXiv:2009.05189v1 [cs.ET] 11 Sep 2020
DOI: 10.13164/re.2020.0001
1Department of Physics and Astronomy, University of South Carolina, Columbia, SC 29208 USA
2Institute of Physics, Opole University, Opole 45-052, Poland
Abstract. Efficient simulation of probabilistic memristors and their networks requires novel modeling approaches. One major departure from the conventional memristor modeling is based on a master equation for the occupation probabilities of network states. In the present article, we show how to implement such master equations in SPICE. In the case studies, we simulate the dynamics of ac-driven probabilistic binary and multi-state memristors, and dc-driven networks of probabilistic binary and multi-state memristors. Our SPICE results are in perfect agreement with known analytical solutions. Examples of LTspice codes are included.
Fig: Ac-driven probabilistic binary memristor: (a) simulated circuit, (b) schematics of SPICE model, and (c) example of current-voltage curves found with SPICE simulations. The listing of SPICE model is given in Apendix.
Appendix: SPICE code examples
B1 0 p0 I=-gm(tau01,V01,V(Va))*V(p0)*u(V(Va))+gm(tau10,V10,-V(Va))*V(p1)*u(-V(Va))
B2 0 p1 I=gm(tau01,V01,V(Va))*V(p0)**u(V(Va))-gm(tau10,V10,-V(Va))*V(p1)**u(-V(Va))
C1 p0 0 1 IC=1
C2 p1 0 1 IC=.0
R2 Va 0 1k
R1 Va 0 10k
R3 VI 0 1k
B3 0 VI I=I(R1)*V(p0)+I(R2)*V(p1)
V1 Va 0 SINE(0 1 200 0 0 0 0)
.FUNC gm(x,y,z)1/(x*exp(-z/y))
.param tau01=3E5 V01=.05
.param tau10=3E5 V10=.05
.tran 0 .1 0.05 10E-7
.backanno
.end
