[C4P] SISPAD 2021, September 27-29

International Conference on Simulation of Semiconductor Processes and Devices

SISPAD 2021, September 27-29

The abstract submission deadline April 9th.

Two-page abstract (text and figures, A4, 10 – 12 pt, pdf) should be sent to <sispad2021@utdallas.edu>  Authors of accepted papers are requested to submit a four-page final paper which will be published in the conference proceedings. The deadline for submission of the four-page final paper is July 9, 2021.

The SISPAD conference series provides an open forum for the presentation of the latest results and trends in process and device simulation. The conference is the leading forum for Technology Computer-Aided Design (TCAD) and is held alternatingly in the United States, Japan, and Europe in September.

Original contributions are solicited for SISPAD 2021 on topics that include but are not limited to:

• Modeling and simulation of established semiconductor device, including FinFETs, GAA FETs, ultra-thin SOI devices, optoelectronic devices, TFTs, sensors, power electronic devices, and organic electronic devices.
• Modeling and simulation of emerging devices including tunnel FETs, SETs, spintronic devices, straintronic devices, bio-electronic devices, and new material-based devices for various applications
• Modeling and simulation of interconnects, including noise and parasitic effects
• Modeling and simulation of all sorts of semiconductor processes, including first principles material design, and growth simulation of nano-scale fabrication
• Advances in fundamental aspects of device modeling and simulation, including of charge, spin, and thermal transport, of collective states including spin/magnetic and charge, and of fluctuation, noise, and reliability.
• Numerical methods and algorithms, including grid generation, user-interface, and visualization
• Compact modeling for circuit simulation, including low-power, high frequency, and power electronics applications
• Process/device/circuit co-simulation in context with system design and verification, including for emerging devices
• Modeling and simulation of equipment, topography, lithography
• Benchmarking, calibration, and verification of simulators

[conference] SISPAD 2020 Technical Program

SISPAD 2020 Technical Program 

1st group; (from 9:00 am on Sep. 23 to 11:59 pm on Sep. 28, JST)

Opening and Welcome Remarks Yoshinari Kamakura; (Osaka Inst. Tech., Japan)

Session 1: Plenary Chairperson: Tatsuya Kunikiyo; (Renesas, Japan)
[1-1] Invited Talk "Forefront of Silicon Quantum Computing"; Kohei M. Itoh; (Keio Univ., Japan) pp.1
[1-2] Invited Talk "Ab-initio quantum transport with a basis of unit-cell restricted Bloch functions and the NEGF formalism"; Marco Pala; (CNRS, Univ. Paris-Sud, France) pp.3
[1-3] Invited Talk "Future of Power Electronics from TCAD Perspective"; Terry Ma; (Synopsys, U.S.A.) pp.7

Session 2: Band Structure Chairperson: Chioko Kaneta; (Tohoku Univ., Japan)
[2-1] Invited Talk "Computics Approach toward Clarification of Atomic Reactions during Epitaxial Growth of GaN"; Atsushi Oshiyama; (Nagoya Univ., Japan) pp.11
[2-2] "Estimation of Phonon Mean Free Path in Small-Scaled Si Wire by Monte Carlo Simulation"; Y. Suzuki1, Y. Fujita1, K. Fauziah2, T. Nogita2 H. Ikeda2, T. Watanabe3, Y. Kamakura1; (1 Osaka Inst. Tech., 2 Shizuoka Univ., 3 Waseda Univ., Japan) pp.15
[2-3] "First-principles study of dopant trap level and concentration in Si(110)/a-SiO2 interface"; G.Kang, J. Jeon, J. Kim, H. Ahn, I. Jang, D. Kim; (Samsung Electronics, Korea) pp.19
[2-4] "Energy Band Calculation of Si/Si0.7Ge0.3 Nanopillars in k Space"; M-H Chuang, Y. Li; (National Chiao Tung Univ., Taiwan) pp.23
[2-5] "Full Band Monte Carlo simulation of phonon transfer at interfaces"; N. D. Le1, B. Davier1,2, P. Dollfus1, M. Pala1, A. Bournel1, J. Saint-Martin1; (1 Universite Paris-Saclay, CNRS, France, 2 Univ. Tokyo, Japan) pp.27
[2-6] "First Principle Simulations of Electronic and Optical Properties of a Hydrogen Terminated Diamond Doped by a Molybdenum Oxide Molecule"; J.McGhee, V. P. Georgiev; (Univ. Glasgow, U.K.) pp.31

Session 3: Computational Methodology Chairpersons: Yiming Li; (National Chao Tung Univ., Taiwan)Victor Moroz; (Synopsys, U.S.A.)
[3-1] "High-sigma analysis of DRAM write and retention performance: a TCAD-to-SPICE approach"; S. M. Amoroso1, J. Lee1, A. R. Brown1, P. Asenov1, X. W. Lin2, T. Yang3, V. Moroz2; (1 Synopsys Europe, U.K., 2 Synopsys, U.S.A., 3 Synopsys Taiwan, Taiwan) pp.35
[3-2] "Generative Model Based Adaptive Importance Sampling for Flux Calculations in Process TCAD"; A. Scharinger1, P. Manstetten1, A. Hossinger2, J. Weinbub1; (1 TU Wien, Austria, 2 Silvaco Europe, U.K.) pp.39
[3-3] "Implant heating contribution to amorphous layer: a KMC approach"; P. L. Julliard1,2, P. Dumas1, F. Monsieur1, F. Hilario1, D. Rideau1, A. Hemeryck2, F.Cristiano2; (1 STMicroelectronics, France, 2 LAAS-CNRS, Univ. Toulouse, France) pp.43
[3-4] "Automatic Modeling of Logic Device Performance Based on Machine Learning Utilizing Feature Engineering"; S. Kim, K. Lee, Y. Shin, K. Chang, J. Jeong, S. Baek, M. Kang, K. Cho, D. Kim; (Samsung Electronics, Korea) pp.47
[3-5] "Gummel-cycle Algebraic Multigrid Preconditioning for Large-scale Device Simulations"; H. Koshimoto1, H. Ishimabuchi2, J. Yoo2, Y. Kayama1, S. Yamada1, U. Kwon2, D. S. Kim2; (1 Samsung R&D Inst. Japan, Japan, 2 Samsung Electronics, Korea) pp.51
[3-6] "A continuous cellular automaton method with flux interpolation for two-dimensional electron gas electron transport analysis"; K.Fukuda1, J. Hattori1, H. Asai1, J. Yaita2, J. Kotani2; (1 AIST, Japan, 2 Fujitsu, Japan) pp.55
[3-7] "Geometric Advection Algorithm for Process Emulation"; X.Klemenschits, S. Selberherr, L. Filipovic; (TU Wien, Austria) pp.59

Session 4: Nanowire Chairperson: Susanna Reggiani; (Univ. Bologna, Italy)
[4-1] "Performance and Leakage Analysis of Si and Ge NWFETs Using a Combined Subband BTE and WKB Approach"; Z. Stanojevic, K. Steiner, G. Strof, O. Baumgartner, G. Rzepa, M. Karner; (Global TCAD Solutions, Austria) pp.63
[4-2] "Molecular Dynamics Modeling of the Radial Heat Transfer from Silicon Nanowires"; I. Bejenari1, A. Burenkov1, P. Pichler1, I. Deretzis2, A. La Magna2; (1 Fraunhofer IISB, Germany, 2 CNR-IMM, Italy) pp.67
[4-3] "Advanced simulations on laser annealing: explosive crystallization and phonon transport corrections"; A. Sciuto1,2, I. Deretzis1, S. F. Lombardo1, M. G. Grimaldi2, K. Huet3, B. Curvers3, B. Lespinasse3, A. Verstraete3, I. Bejenari4, A. Burenkov4, P. Pichler4, A. La Magna1; (1 CNR-IMM, Italy, 2 Univ. Catania, Italy, 3 LASSE laser systems and solutions of Europe, France, 4 Fraunhofer IISB, Germany) pp.71
[4-4] "Effect of Unit-Cell Arrangement on performance of Multi-Stage-planar Cavity-free Unileg Thermoelectric Generator Using Silicon Nanowires"; K. Abe1, K. Oda1, M. Tomita1, T. Matsukawa2, T. Matsuki1,2, T. Watanabe1; (1 Waseda Univ., Japan, 2 AIST, Japan) pp.75
[4-5] "Characteristics of Gate-All-Around Silicon Nanowire and Nanosheet MOSFETs with Various Spacers"; S. R. Kola, Y. Li, N. Thoti; (National Chiao Tung Univ., Taiwan) pp.79

Session 5: Material and Geometry Impact Chairpersons: Jun’ichi Hattori; (AIST, Japan)William Vandenberghe; (Univ. Texas at Dallas, U.S.A.)
[5-1] Invited Talk "On the Physical Mechanism of Negative Capacitance Effect in Ferroelectric FET"; Masaharu Kobayashi; (Univ. Tokyo, Japan) pp.83
[5-2] "Undoped SiGe material calibration for numerical laser annealing simulations"; A-S. Royet1, L. Dagault1,2, S. Kerdiles1, P. Acosta-Alba1, J. P. Barnes1, F. Cristiano2, H. Huet3; (1 Univ. Grenoble Alpes, France, 2 LAAS, CNRS Univ. Toulouse, France, 3 Laser Systems & Solutions of Europe, France) pp.89
[5-3] "TCAD simulation for transition metal dichalcogenide channel Tunnel FETs consistent with ab-initio based NEGF calculation"; H. Asai1, T. Kuroda2, K. Fukuda1, J. Hattori1, T. Ikegami1, N. Mori2; (1 AIST, Japan, 2 Osaka Univ., Japan) pp.93
[5-4] "Ab Initio Study of Magnetically Intercalated Tungsten Diselenide"; P. D. Reyntjens1,2,3, S. Tiwari1,2,3, M. L. Van de Put1, B. Sor´ee2,3,4, W. G. Vandenberghe1; (1 Univ. Texas at Dallas, U.S.A., 2 Imec, Belgium, 3 KU Leuven, Belgium, 4 Univ. Antwerp, Belgium) pp.97
[5-5] "A Study of Wiggling AA modeling and Its Impact on Device Performance in Advanced DRAM"; Q.Wang, Y. D. Chen, J. Huang, W. Liu, E. Joseph; (Lam Research, China) pp.101
[5-6] "Reactive Force-Field Molecular Dynamics Study of the Silicon-Germanium Deposition Processes by Plasma Enhanced Chemical Vapor Deposition"; N. Uene1, T. Mabuchi1, M. Zaitsu2, S. Yasuhara2, T. Tokumasu1; (1 Tohoku Univ., Japan, 2 Japan Advanced Chemicals, Japan) pp.105

2nd group; (from 9:00 am on Sep. 28 to 11:59 pm on Oct. 3, JST)

Session 6: Reliability Chairpersons: Markus Karner; (Global TCAD Solutions, Austria)Hajime Tanaka; (Kyoto Univ., Japan)
[6-1] "Universal Feature of Trap-Density Increase in Aged MOSFET and Its Compact Modeling"; F. Avila Herrera1, M. Miura-Mattausch1, T. Iizuka1, H. Kikuchihara1, H. J. Mattausch1, H.Takatsuka2; (1 Hiroshima Univ., Japan, 2 USJC, Japan) pp.109
[6-2] "TCAD Incorporation of Physical Framework to Model N and P BTI in MOSFETs"; R. Tiwari, N. Chowdhury, T. Samadder, S. Mukhopadhyay, N. Parihar, S. Mahapatra; (Indian Inst. Tech., India) pp.113
[6-3] "Benchmarking Charge Trapping Models with NBTI, TDDS and RTN Experiments"; S.Bhagdikar, S. Mahapatra; (Indian Inst. Tech., India) pp.117
[6-4] "A TCAD Framework for Assessing NBTI Impact Under Drain Bias and Self-Heating Effects in Replacement Metal Gate; (RMG)p-FinFETs"; U.Sharma, S. Mahapatra; (Indian Inst. Tech., India) pp.121
[6-5] "Model analysis for effects of spatial and energy profiles of plasma process-induced defects in Si substrate on MOS device performance"; T.Hamano, K. Urabe, K. Eriguchi; (Kyoto Univ., Japan) pp.125

Session 7: Power and Optoelectronic Devices Chairpersons: Blanka Magyari-Kope; (TSMC at U.S.A., U.S.A.)Hideki Minari; (Sony Semiconductor Solutions, Japan)
[7-1] Invited Talk "Modeling and Simulation of Si IGBTs"; Naoyuki Shigyo; (Tokyo Inst. Tech., Japan) pp.129
[7-2] "Full Band Monte Carlo simulations of GaAs p-i-n Avalanche PhotoDiodes: What are the Limits of Nonlocal Impact Ionization Models?"; A. Pilotto1, F. Driussi1, D. Esseni1, L. Selmi2, M. Antonelli3, F. Arfelli3,4, G. Biasiol5, S. Carrato3, G. Cautero6,4, D. De Angelis6, R. H. Menk6,4, C. Nichetti6,3, T. Steinhartova5, P. Palestri1; (1 Univ. Udine, Italy, 2 Univ. Modena and Reggio Emilia, Italy, 3 Univ. Trieste, Italy, 4 INFN, Italy, 5 IOM CNR, Italy, 6 Elettra-Sincrotrone, Italy) pp.131
[7-3] "A technique for phase-detection auto focus under near-infrared-ray incidence in a back-side illuminated CMOS image sensor pixel with selectively grown germanium on silicon"; T. Kunikiyo, H. Sato, T. Kamino, K. Iizuka, K. Sonoda, T. Yamashita; (Renesas Electronics, Japan) pp.137
[7-4] "Investigation of the relationship between current filament movement and local heat generation in IGBTs by using modified avalanche model of TCAD"; T.Suwa; (Toshiba Electronic Devices & Storage, Japan) pp.141
[7-5] "Verilog-A model for avalanche dynamics and quenching in Single-Photon Avalanche Diodes"; Y. Oussaiti1,2, D. Rideau1, J. R. Manouvrier1, V. Quenette1, H. Wehbe-Alause1, B. Mamdy1, A. Lopez1, G. Mugny1, M. Agnew1, E. Lacombe1, J. Grebot1, P. Dollfus2, M. Pala2; (1 STMicroelectronics, France, 2 Centre de Nanosciences et de Nanotechnologies, France) pp.145
[7-6] "A Novel Full-Band Monte Carlo Device Simulator with Real-Space Treatment of the Short-Range Coulomb Interactions for Modeling 4H-SiC Power Devices"; C-Y. Cheng, D. Vasileska; (Arizona State Univ., U.S.A.) pp.149
[7-7] "Tight-binding simulation of optical gain in h-BCN for laser application"; D.Maki, M. Ogawa, S. Souma; (Kobe Univ., Japan) pp.153
[7-8] "Predictive Compact Modeling of Abnormal LDMOS Characteristics Due to Overlap Length Modification"; T. Iizuka1, D. Navarro1, M. Miura-Mattausch1, H. Kikuchihara1, H. J. Mattausch1, D.R. Nestor2; (1 Hiroshima Univ., Japan, 2 Allegro MicroSystems, U.S.A.) pp.157

Session 8: Non-Volatile Memory I Flash and Phase Change Memory Chairperson: Kentaro Kukita; (Kioxia, Japan)
[8-1] "A TCAD Study on Mechanism and Countermeasure for Program Characteristics Degradation of 3D Semicircular Charge Trap Flash Memory"; N. Kariya, M. Tsuda, T. Kurusu, M. Kondo, K. Nishitani, H. Tokuhira, J. Shimokawa, Y. Yokota, H. Tanimoto, S. Onoue, Y. Shimada, T. Kato, K. Hosotani, F. Arai, M. Fujiwara, Y.Uchiyama, K. Ohuchi; (Kioxia, Japan) pp.161
[8-2] "Impact of Random Phase Distribution in 3D Vertical NAND Architecture of Ferroelectric Transistors on In-Memory Computing"; G.Choe, W. Shim, J. Hur, A. I. Khan, S. Yu; (Georgia Inst. Tech., U.S.A.) pp.165
[8-3] "TCAD Modeling and Optimization of 28nm HKMG ESF3 Flash Memory"; A. Zaka, T. Herrmann, R. Richter, S. Duenkel, R. Jain; (GLOBALFOUNDRIES, Germany) pp.69
[8-4] "Coupling the Multi Phase-Field Method with an Electro-Thermal Solver to Simulate Phase Change Mechanisms in Ge-rich GST based PCM"; R. Bayle1,2,3, O. Cueto1, S. Blonkowski1, T. Philippe3, H. Henry3, M. Plappa3; (1 CEA-LETI, France, 2 STMicroelectronics, France, 3 Ecole Polytechnique, France) pp.173

Session 9: Transport Chairperson: Christoph Jungemann; (Univ. Aachen, Germany)
[9-1] "Efficient partitioning of surface Green’s function: toward ab initio contact resistance study"; G. Gandus1,2, Y. Lee2, D. Passerone1, M. Luisier2; (1 nanotech@surfaces; (EMPA), Switzerland, 2 Integrated Systems Laboratory; (ETH Zurich), Switzerland) pp.177
[9-2] "Quantum transport in Si: P δ-layer wires"; J. P. Mendez, D. Mamaluy, X. Gao, L. Tracy, E. Anderson, D. Campbell, J. Ivie, T.-M. Lu, S.Schmucker, S. Misra; (Sandia National Laboratories, U.S.A.) pp.181
[9-3] "Analytical Formulae for the Surface Green’s Functions of Graphene and 1T’ MoS2 Nanoribbons"; H.Kosina, V. Sverdlov; (TU Wien, Austria) pp.185
[9-4] "Numerical Solution of the Constrained Wigner Equation"; R.Kosik, J. Cervenka, H. Kosina; (TU Wien, Austria) pp.189
[9-5] "Calibrated Si Mobility and Incomplete Ionization Models with Field Dependent Ionization Energy for Cryogenic Simulations"; H. Y. Wong; (San Jose State Univ., U.S.A.) pp.193

Session 10: Non-Volatile Memory II ReRAM and MRAM Chairperson: Uihui Kwon; (Samsung, Korea)
[10-1] "Monte Carlo Simulation of a Three-Terminal RRAM with Applications to Neuromorphic Computing"; A.Balasingam, A. Levy, H. Li, P. Raina; (Stanford Univ., U.S.A.) pp.197
[10-2] "Fully Analog ReRAM Neuromorphic Circuit Optimization using DTCO Simulation Framework"; A. Nguyen1, H. Nguyen1, S. Venimadhavan1, A. Venkattraman2, D. Parent1, H. Y. Wong1; (1 San Jose State Univ., U.S.A., 2 Univ. California Merced, U.S.A.) pp.201
[10-3] "Effect of Shape Deformation due to Edge Roughness in Spin-Orbit Torque Magnetoresistive Random-Access Memory"; Byun, D. H. Kang, M. Shin; (KAIST, Korea) #205
[10-4] "Computation of Torques in Magnetic Tunnel Junctions through Spin and Charge Transport Modeling"; S. Fiorentini1, J. Ender1, M. Mohamedou1, R. Orio1, S. Selberherr1, W. Goes2, V. Sverdlov1; (1 TU Wien, Austria, 2 Silvaco Europe, U.K.) pp.209
[10-5] "Efficient Demagnetizing Field Calculation for Disconnected Complex Geometries in STT-MRAM Cells"; J. Ender1, M. Mohamedou1, S. Fiorentini1, R. Orio1, S. Selberherr1, W. Goes2, V. Sverdlov1; (1 TU Wien, Austria, 2 Silvaco Europe, U.K.) pp.213
[10-6] "Properties of Conductive Oxygen Vacancies and Compact Modeling of IV Characteristics in HfO2 Resistive Random-Access-Memories"; J.Park, M.-J. Kim, J.-H. Jang, S.-M. Hong; (Gwangju Inst. Sci. Tech., Korea) pp.217

Session 11: High Speed Switching Devices Chairpersons: Akira Hiroki; (Kyoto Inst. Tech., Japan)Sebastien Martinie; (CEA-LETI, France)
[11-1] "MOS-like approach for compact modeling of HEMT transistor"; A. Vaysset, S. Martinie, F. Triozon, O. Rozeau, M.-A. Jaud, R. Escoffier, T. Poiroux; (CEA, LETI, Univ. Grenoble Alpes, France) pp.221
[11-2] "Compact modeling of gate leakage phenomenon in GaN HEMTs"; K. Li1,3, E. Yagyu2, H. Saito2, K. H. Teo1; (1 Mitsubishi Electric Research Labs, U.S.A., 2 Mitsubishi Electric Corp., Japan, 3 Univ. Illinois at Urbana-Champaign, U.S.A.) pp.225
[11-3] "Effect of Atomic Interface on Tunnel Barrier in Ferroelectric HfO2 Tunnel Junctions"; J.Seo, M. Shin; (KAIST, Korea) pp.229
[11-4] "Surge Current Capability in lateral AlGaN/GaN Hybrid Anode Diodes with p-GaN/Schottky Anode"; G. Atmaca1, M.-A. Jaud1, J. Buckley1, R. Gwoziecki1, A. Yvon2, E. Collard2, M. Plissonnier1, T.Poiroux1; (1 CEA, LETI, Univ. Grenoble Alpes, France, 2 STMicroelectronics, France) pp.233
[11-5] "Dynamic Simulation of Write ‘1’ Operation in the Bi-stable 1-Transistor SRAM Cell"; T. Dutta1, F. Adamu-Lema1, A. Asenov1, Y. Widjaja2, V. Nebesnyi3; (1 Semiwise, U.K., 2 Zeno Semiconductor, 3 MCPG) pp.237
[11-6] "Simulation of gated GaAs-AlGaAs resonant tunneling diodes for tunable terahertz communication applications"; V. Georgiev, A. Sengupta, P. Maciazek, O. Badami, C. Medina-Bailon, T. Dutta, F.Adamu-Lema, A. Asenov; (Univ. Glasgow, U. K.) pp.241
[11-7] "Theoretical Study of Double-Heterojunction AlGaN/GaN/InGaN/δ-doped HEMTs for Improved Transconductance Linearity"; T.-H. Yu; (Inforsight Computing, Taiwan) pp.245
[11-8] "Nanoscale FET: How To Make Atomistic Simulation Versatile, Predictive, and Fast at 5nm Node and Below"; P. Blaise1, U. Kapoor1, M. Townsend1, E. Guichard1, J. Charles2, D. A. Lemus2, T. Kubis2; (1 Silvaco, U.S.A., 2 Purdue Univ., U.S.A.) pp.249

3rd group; (from 9:00 am on Oct. 1 to 11:59 pm on Oct. 6, JST)

Session 12: Emerging Devices Chairpersons: Andres Godoy; (Univ. Granada, Spain)Sung-Ming Hong; (Gwangju Inst. Sci. Tech., Korea)
[12-1] Invited Talk "TCAD-Assisted MultiPhysics Modeling & Simulation for Accelerating Silicon Quantum Dot Qubit Design"; Fahd Ayyalil Mohiyaddin; (imec, Belgium) pp.253
[12-2] "Physics-augmented Neural Compact Model for Emerging Device Technologies"; Y.Kim, S. Myung, J. Ryu, C. Jeong, D. S. Kim; (Samsung Electronics, Korea) pp.257
[12-3] "A Modeling Study on Performance of a CNOT Gate Devices based on Electrode-driven Si DQD Structures"; H.Ryu, J.-H. Kang; (Korea Inst. Sci. Tech. Info., Korea) pp.261
[12-4] "Simulation and Evaluation of Plasmonic Circuits"; M.Fukuda, Y. Ishikawa; (Toyohashi, Univ. Tech., Japan) pp.265
[12-5] "Numerical study of surface chemical reactions in 2D-FET based pH sensors"; A. Toral-Lopez1, E. G. Marin1, J. Cuesta1, F. G. Ruiz1, F. Pasadas2, A. Mediana-Rull1, A.Godoy1; (1 Univ. Granada, Spain, 2 Univ. Autonoma Barcelona, Spain) pp.269
[12-6] "A Combined First Principle and Kinetic Monte Carlo Study of Polyoxometalates Based Molecular Memory Devices"; P. Lapham, O. Badami, C. Medina-Bailon, F. Adamu-Lema, T. Dutta, V. Georgiev, A.Asenov; (Univ. Glasgow, U.K.) pp.273
[12-7] "Modeling Assisted Room Temperature Operation of Atomic Precision Advanced Manufacturing; (APAM)Devices"; X. Gao, L. Tracy, E. Anderson, DeAnna Campbell, J. Ivie, T.-M. Lu, D. Mamaluy, S.Schmucker, S. Misra; (Sandia National Lab., U.S.A.) pp.277

Session 13: 2D and Nano System I Chairperson: Jeff Wu; (TSMC, Taiwan)
[13-1] "Effects of the Dielectric Environment on Electronic Transport in Monolayer MoS2: Screening and Remote Phonon Scattering"; M. L. Van de Put, G. Gaddemane, S. Gopalan, M. V. Fischetti; (Univ. Texas at Dallas, U.S.A.) pp.281
[13-2] "Impact of Schottky Barrier on the Performance of Two-Dimensional Material Transistors"; S.-K. Su, J. Cai, E. Chen, L.-J. Li, H.-S. Philip Wong; (TSMC, Taiwan) pp.285
[13-3] "AC NEGF Simulation of Nanosheet MOSFETs"; S.-M. Hong, P.-H. Ahn; (Gwangju Inst. Sci. Tech., Korea) pp.289
[13-4] "Enhanced Capabilities of the Nano-Electronic Simulation Software; (NESS)"; C. Medina-Bailon, O. Badami, H. Carrillo-Nunez, T. Dutta, D. Nagy, F. Adamu-Lema, V.Georgiev, A. Asenov; (Univ. Glasgow, U.K.) pp.293
[13-5] "Electrostatic Potential Profile Generator for Two-Dimensional Semiconductor Devices"; S.-C. Han, J. Choi, S.-M. Hong; (Gwangju Inst. Sci. Tech., Korea) pp.297

Session 14: FET Devices and Design Technology Co-Optimization Chairpersons: Mehdi Bazizi,; (Applied Materials, U.S.A.)Lado Filipovic; (TU Wien, Austria)
[14-1] Invited Talk "Agile Pathfinding Technology Prototyping: the Hunt for Directional Correctness"; Daniel Chanemougame; (TEL at Albany, U.S.A.) pp.301
[14-2] "Self-Aligned Single Diffusion Break Technology Optimization Through Material Engineering for Advanced CMOS Nodes"; A. Pal, E. M. Bazizi, L. Jiang, M. Saremi, B. Alexander, B. Ayyagari-Sangamalli; (Applied Materials, U.S.A.) pp.307
[14-3] "L-UTSOI: A compact model for low-power analog and digital applications in FDSOI technology"; S. Martinie1, O. Rozeau1, T. Poiroux1, P. Scheer1, S. E. Ghouli2, M. Kang3, A. Juge2, H. Lee3; (1 CEA, LETI, Univ. Grenoble Alpes, France, 2 STMicroelectronics, France, 3 Samsung, Korea) pp.311
[14-4] "Electromigration Model for Platinum Hotplates"; L.Filipovic; (TU Wien, Austria). pp.315
[14-5] "Compact Modeling of Radiation Effects in Thin-Layer SOI-MOSFETs"; M. Miura-Mattausch, H. Kikuchihara, D. Navarro, T. Iizuka, H. J. Mattausch; (Hiroshima Univ., Japan). pp.319
[14-6] "Complementary FET Device and Circuit Level Evaluation Using Fin-Based and Sheet-Based Configurations Targeting 3nm Node and Beyond"; L. Jiang, A. Pal, E. M. Bazizi, M. Saremi, R. He, B. Alexander, B. Ayyagari-Sangamalli; (Applied Materials, U.S.A.) pp.323
[14-7] "Via Size Optimization for Optimum Circuit Performance at 3 nm node"; S. Mittal1, A. Pal2, M. Saremi2, E. M. Bazizi2, B. Alexander2, B. Ayyagari-Sangamalli2; (1 Applied Materials, India, 2 Applied Materials, U.S.A.) pp.327
[14-8] "Time-Resolved Mode Space based Quantum-Liouville type Equations applied onto DGFETs"; L.Schulz, D. Schulz; (TU Dortmund, Germany) pp.331

Session 15: Machine Learning Chairpersons: Satofumi Souma; (Kobe Univ., Japan)Hiuyung Wong; (San Jose State Univ., U.S.A.)
[15-1] Invited Talk "Power Device Degradation Estimation by Machine Learning of Gate Waveforms"; Makoto Takamiya; (Univ. Tokyo, Japan) pp.335
[15-2] "Machine Learning Prediction of Formation Energies in a-SiO2"; D.Milardovich, M. Jech, D. Waldhoer, M. Waltl, T. Grasser; (TU Wien, Austria) pp.339
[15-3] "Novel Optimization Method using Machine-learning for Device and Process Competitiveness of BCD Process"; J. Kim, J.-H. Yoo, J. Jung, K. Kim, J. Bae, Y.-S. Kim, O.-K. Kwon, U.-H. Kwon, D.-S. Kim; (Samsung Electronics, Korea) pp.343
[15-4] "Real-Time TCAD: a new paradigm for TCAD in the artificial intelligence era"; S. Myung, J. Kim, Y. Jeon, W. Jang, J. Kim, S Han, K.-H. Baek, J. Ryu, Y.-S. Kim, J. Doh, C.Jeong, D. -S. Kim; (Samsung Electronics, Korea) pp.347
[15-5] "Application of Noise to Avoid Overfitting in TCAD Augmented Machine Learning"; S. S. Raju1, B. Wang2, K. Mehta1, M. Xiao2, Y. Zhang2, H.-Y. Wong1; (1 San Jose Univ., U.S.A., 2 Virginia Polytech. Inst. State Univ., U.S.A.) pp.351
[15-6] "Automatic Device Model Parameter Extractions via Hybrid Intelligent Methodology"; C.-C. Liu, Y. Li, Y.-S. Yang, C.-Y. Chen, M.-H. Chuang; (National Chiao Tung Univ., Taiwan) pp.355
[15-7] "Physics-Informed Graph Neural Network for Circuit Compact Model Development"; X. Gao, A. Huang, N. Trask, S. Reza; (Sandia National Lab., U.S.A.) pp.359

Session 16: 2D and Nano System II Chairperson: Frank Register; (Univ. Texas at Austin, U.S.A.)
[16-1] "Theoretical study of electronic transport in monolayer SnSe"; S. Gopalan1, G. Gaddemane2, M. L. Van de Put1, M. V. Fischetti1; (1 Univ. Texas at Dallas, U.S.A., 2 imec, Belgium) pp.363
[16-2] "Transient simulation of graphene FET gated by electrolyte medium"; K. Arihori1, M. Ogawa1, S. Souma1, J. Sato-Iwanaga2, M. Suzuki2; (1 Kobe Univ., Japan, 2 Panasonic, Japan) pp.367
[16-3] "Quantum Transport Simulations of Phosphorene Nanoribbon MOSFETs: Effects of Metal Contacts, Ballisticity and Series Resistance"; M.Poljak, Mislav Matic; (Univ. Zagreb, Croatia) pp.371
[16-4] "High-Performance Metal-Ferroelectric-Semiconductor Nanosheet Line Tunneling Field Effect Transistors with Strained SiGe"; N. Thoti1, Y. Li1, S. R. Kola1, S. Samukawa2; (1 National Chaio Tung Univ., Taiwan, 2 Tohoku Univ., Japan) pp.375
[16-5] "A First-Principles Study on the Strain-induced Localized Electronic Properties of Dumbbell-shape Graphene Nanoribbon for Highly Sensitive Strain Sensors"; Q.Zhang, K. Suzuki, H. Miura; (Tohoku Univ., Japan) pp.379

Late News Chairperson: Tatsuya Kunikiyo; (Renesas Electronics, Japan)
LN "Multiband Phase Space Operator for Narrow Bandgap Semiconductor Devices"; L.Schulz, D. Schulz; (TU Dortmund, Germany) pp.383

[SISPAD] Compact Modeling Worksops - Enabling Better Insight of Device Features - Monday, September 8, 2014

 SISPAD Compact Modeling Workshop
 Enabling Better Insight of Device Features 

 Monday, September 8, 2014

 Workshop Program

09:15 - 09:20: Opening 

09:20 - 10:00: J. Takeya (University of Tokyo, Japan): invited Physics of Charge Transport in Organic Field-Effect Transistors
10:00 - 10:40: C. Jungemann (RWTH Aachen University, Germany): invited Validity of Macroscopic Noise Models in the Case of High-Frequency Bipolar Transistors

10:40 - 11:00: break

11:00 - 11:40: N. Goldsman (University of Maryland, USA): invited Key Issues in the Modeling of SiC Electronic Devices
11:40 - 12:10: C. Ma (Hiroshima University, Japan): invited Universal Model of the Negative Bias Temperature Instability (NBTI) Effect for Circuit Aging Simulation

12:10 - 12:30: poster presentations

• P. X. Tran (International University, Vietnam) A Comprehensive Model for the Changing I-V Characteristics of raphene Transistors 
• M. Ghittorelli, F. Torricelli, Z. M. Kovacs-Vajna, and L. Calalongo (University of Brescia, Italy) Accurate Modeling of Amorphous Indium-Gallium-Zinc-Oxide TFTs Deposited on Plastic Foil 
• S. Sato, Y. Omura, and A. Mallik (Kansai University, Japan) Proposal of Simple Channel-Length-Dependent Current Model for Subthreshold Region of Nano-Wire Tunnel FET 
• H. Miyamoto, H. Zenitani, H. Kikuchihara, H. J. Mattausch, M. Miura-Mattausch, and T. Nakagawa (HU & AIST, Japan) Consistent Compact Modeling of MOSFETs from Bulk to Double-Gate Structures

12:30 - 13:50: lunch

13:50 - 14:30: D. Warning (Creative Chips GmbH, Germany): invited NGSPICE – an Open Platform for Modeling and Simulation
14:30 - 15:00: A. Schaldenbrand (Cadence Design Systems, Japan): invited Benefits of Verilog-A for Behavioral Modeling and Compact Modeling
15:00 - 15:30: P. Lee (Micron Memory Japan, Inc.): invited Compact Model Coalition: World-Wide Model Standardization for an Expanding Industry

15:30 - 15:40: break

15:40 - 16:00: F. Torricelli, M. Ghittorelli, M. Rapisarda, L. Mariucci, S. Jacob, R. Coppard, E. Cantatore, Z. M. Kovacs-Vajna, and L. Colalongo (Unviersity of Brescia, Italy) Analytical Drain Current Model of Both p- and n-Channel OTFTs for Circuit Simulation
16:00 - 16:20: T. Nakagawa, T. Sekigawa, M. Hioki, Y. Ogasahara, H. Koike, H. Zenitani, H. Miyamoto, H. Kikuchihara, H. J. Mattausch, M. Miura-Mattausch, H. Oda, and N. Sugii (AIST, HU, LEAP, Japan) Parameter-Extraction Strategy of Ultra-Thin Silicon and BOX Layer MOSFETs for Low Voltage Applications
16:20 - 16:40: T. Mizoguchi, T. Naito, Y. Kawaguchi, and W. Hatano (Toshiba, Japan) Compact Modeling of GaN-MISFET for Power Applications
16:40 - 17:00: T. Yamamoto and H. Kato (Denso, Japan) Analysis and Modeling of Injection Enhanced Insulated Gate Bipolar Transistor

17:00: Closing