[paper] Compact Model for SiC Power MOSFETs

Cristino Salcines¹, Sourabh Khandelwal² and Ingmar Kallfass¹ 

A Compact Model for SiC Power MOSFETs 

for Large Current and High Voltage Operation Conditions 

(2021) arXiv-2104. 

1 University of Stuttgart Stuttgart, Germany

2 Macquarie University Sydney, Australia  

Abstract: This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs are presented. The formulations account for the effect of the large SiC/SiO2 interface traps density characteristic of SiC MOSFETs and its dependence with temperature. The modeling of interface charge density is found to be necessary to describe the electrostatics of SiC power MOSFETs when operating at simultaneous high current and high voltage regions. The proposed compact model accurately fits the measurement data extracted of a 160 milli ohms, 1200V SiC power MOSFET in the complete IV plane from drain-voltage Vd = 5mV up to 800 V and current ranges from few mA to 30 A.

Fig: Output characteristics up to high current and high voltage in logarithmic scale for VGS = 6V to 20V in steps of 0.5V. Symbols are measurements and solid lines simulations of the proposed model. The logarithmic scale eases the visualization of both low and high VDS voltages in a single graph.

[Si2 CMC] to Standardize SPICE Model for SiC MOSFET

May 03, 2021 // By Peter Clarke [eenewsanalog.com] 

The Compact Model Coalition (CMC) working group of the Silicon Integration Initiative (SI2) has agreed to standardize a model for the behaviour of a silicon-carbide MOSFET.

Silicon-carbide offers higher efficiency and faster operation than silicon and has been adopted for several power applications including photovoltaic inverters and converters, industrial motor drives, electric vehicle powertrain and EV charging, and power supply and distribution. A CMC working group will oversee the model development with Analog Devices, Cadence Design Systems, Infineon, Qualcomm, Siemens EDA, Silvaco and Synopsys set to participate.

"I'd encourage companies with a stake in silicon-carbide devices to join this effort and help guide selection of the model which best represents their intended use," 

advised Peter Lee, chair of the CMC.

Now in its 25th year, the Si2 Compact Model Coalition provides semiconductor manufacturers, designers, and simulation tool providers a means to pool resources to fund standardization and optimization of standard compact SPICE models and standard interfaces to promote simulation tool interoperability [Read more...]