[paper] Efficient Long-Channel MOSFET Model

Ananda Sankar Chakraborty

Efficient Long-Channel MOSFET Model 

with SPICE-enabled Lambert W Function for Universal Application

Silicon (2025): 1-10; DOI 0.1007/s12633-025-03576-1

1 ETCE, Indian Institute of Engineering Science and Technology, Shibpur (IN)

Abstract: A novel, accurate charge-based MOSFET long-channel computational model is presented, which is portable and can be used across the electrical engineering domains ranging from sensing to power electronics, both under sub-threshold as well as super-threshold regime of MOSFET operation. The proposed physics-based model can be universally used to any long-channel MOS-transistor, as it does not depend on any empirical factor and features extremely good computational efficiency. The model uses a novel two-step charge linearization, resulting into accurate drain current and charge model – valid for both the subthreshold and super-threshold regime of long-channel MOSFET operation. Another salient feature of the proposed model is a novel SPICE-compatible numerical solution strategy for the principal branch of the Lambert W function (W0(x) for {x ∈ R | x ≥ 0}). The algorithm is faster than present industry standard implementations, computationally efficient, accurate with maximum percentage error≈10−14% and therefore may be incorporated in a SPICE engine for electrical design and optimization. The proposed computationally efficient long channel MOSFET model is validated against thorough TCAD simulations upto the fourth derivative and has been found to have fast convergence along with much higher degree of accuracy compared to existing MOSFET models.

FIG: Bulk-MOSFET structure: its current (I_DS) and conductance (g_DS) vs Drain Voltage (V_DS)

(Line: proposed model, symbol: TCAD)

[paper] Analytical Compact Model Of Cylindrical Junctionless Nanowire FETs

Adelcio M. de Souza, Daniel R. Celino, Regiane Ragi, Murilo A. Romero

Fully analytical compact model for the Q–V and C–V characteristics 

of cylindrical junctionless nanowire FETs

Microelectronics Journal (2021): 105324

DOI: 10.1016/j.mejo.2021.105324

   

University of Sao Paulo (EESC/USP), Sao Carlos (BR)

Abstract: This paper develops a new compact model for the Q–V and C–V characteristics of cylindrical junctionless nanowire FETs in which the nanowire radius is large enough, in such a way that quantum confinement effects can be neglected. Our model is fully analytical and valid for all bias regimes, i.e., subthreshold, partial depletion, and accumulation. The obtained Q-V and C–V characteristics, as well as their derivatives, are continuous across the full range of bias voltages. The model is fully physics-based, with no fitting parameters, and it is very intuitive, since it relies on the understanding of the device as a gated resistor. Model validation is performed against previous results in the literature, demonstrating very good agreement.

Fig.  Validation of our C–V model (solid lines) in comparison to numerical results, highlighting the effect of parasitic capacitance. The free-carrier capacitance component from new model is shown in dashed lines. Simulation parameters: tox = 4.5nm, Nd = 1.6E18 cm−3, L = 200nm, VFB = 1.09V and Vds = 0.05V.

Acknowledgments: The authors would like to thank the Brazilian funding agencies CAPES, CNPq, and Fapesp for their financial support: Conselho Nacional de Desenvolvimento Científico e Tecnologico. Grant Number: 303708/2017-4; Coordenaçao de Aperfeiçoamento de Pessoal de Nível Superior; Fundaçao de Amparo a Pesquisa do Estado de Sao Paulo. Grant Number: 18/13537-6.

[paper] Unified Analytical Model for SOI LDMOS

Baoxing Duan, Jingyu Xing, Ziming Dong and Yintang Yang¹ (Senior Member, IEEE)

Unified Analytical Model for SOI LDMOS With Electric Field Modulation

IEEE J-EDS, vol. 8, pp. 686-694, 2020

DOI: 10.1109/JEDS.2020.3006293

¹Key Laboratory of the Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi’an 710071, China

Abstract: The unified analytical model is proposed for SOI LDMOS (Silicon On Insulator Lateral Double-diffused Metal Oxide Semiconductor) based on the electric field modulation in this paper for the first time. The analytical solutions of the surface electric field distributions and potential distributions are derived on the basis of the 2-D Poisson equation. The variation of the buried layer parameters modulates the surface electric field by the electric field modulation effect to optimize the surface electric field distribution of the device. Also, the simulation results obtained through the simulation software ISE are consistent with the expected results of the analytical model. This not only proves the feasibility of the electric field modulation theory, but also shows that the accurate analytical model will be of great guiding significance for designing and optimizing the same LDMOS based on SOI structures.

FIG: Cross-sectional view of electric field modulated SOI LDMOS

Acknowledgment: This work was supported in part by Science Foundation for Distinguished Young Scholars of Shaanxi Province under Grant 2018JC-017, and in part by the 111 Project under Grant B12026.

[paper] Graphene/4H-SiC/Graphene MSM UV-photodetector

An optimized Graphene/4H-SiC/Graphene MSM UV-photodetector operating
in a wide range of temperature 

H. Bencherif ¹, L. Dehimi1 ², G. Messina ³, P. Vincent ⁴, F. Pezzimenti ³, F. G. Della Corte ^{3 1}Laboratory of Metallic and Semiconductor Materials, University of Biskra, Biskra, DZ

²Faculty of Science, University of Batna 1, DZ

³DIIES, Mediterranea University of Reggio Calabria, Reggio Calabria, IT

⁴School of Electronics Engineering, KNU, 80 Daehakro, Buk-gu, Daegu, 702-701, KP

Abstract: In this paper, .an accurate analytical model has been developed to optimize the performance of an Interdigitated Graphene Electrode/p-silicon carbide (IGE/p-4H-SiC) Metal semiconductor Metal (MSM) photodetector operating in a wide range of temperatures. The proposed model considers different carrier loss mechanisms and can reproduce the experimental results well. An overall assessment of the electrodes geometrical parameters’ influence on the device sensitivity and speed performances was executed. Our results confirm the excellent ability of the suggested Graphene electrode system to decrease the unwanted shadowing effect. A responsivity of 238 μA/W was obtained under 325-nm illumination compared to the 16.7 μA/W for the conventional Cr-Pd/p-SiC PD. A photocurrent to- dark-current ratio (PDCR) of 5.75 × 105 at 300K and 270 at 500K was distinguished. The response time was found to be around 14 μs at 300K and 54.5 μs at 500K. Furthermore, the developed model serves as a fitness function for the multi objective optimization (MOGA) approach. The optimized IGE/p-4H-SiC MSM-PD design not only exhibits higher performance in terms of PDCR (7.2×105), responsivity (430A/cm2) and detectivity (1.3×1014 Jones) but also balances the compromise between ultrasensitive and high-speed figures of merit with a response time of 4.7 μs. Therefore, the proposed methodology permits to realize ultra-sensitive, high-speed SiC optoelectronic devices for extremely high temperature applications. 

FIG: a) Energy band diagram of Graphene/p-SiC/Graphene structure, b) Cross-sectional view of the suggested IGE/4H-SiC MSM UV-PD with interdigitated electrodes

Acknowledgments: This work was supported by DGRSDT Of Ministry of Higher education of Algeria. The work was done in the unit of research of materials and renewable energies (URMER).