[paper] ACM) Model in VHDL-AMS

A. S. Kumar, Ch. Rekha, Y. D. S. Raju 

Behavioral Modeling of the Advanced Compact MOSFET (ACM) Model with VHDL-AMS 

OAIJSE, Vol. 6, Issue 1, January 2021 

ISSN (Online) 2456-3293 

*Holymary Institute Of Technology And Science, Bogaram(V), Keesara (M), Hyderabad

Abstract: This paper reports a VHDL-AMS implementation of the Advanced Compact MOSFET (ACM) model. This behavioral model aims at being a reference model for ACM code developers, helping to implement and maintain simulators specic code. Simulation results from classical testbenches are presented and con_rm the correctness of the proposed model.

Fig: The used methodology propose this testbench [ref]

[ref] A. L. T. B. da Fonseca and F. R. de Sousa, "Behavioral modeling of the Advanced Compact MOSFET (ACM) model with VHDL-AMS," 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, Montreal, QC, 2008, pp. 169-172

doi: 10.1109/NEWCAS.2008.4606348.

Abstract: This paper reports a VHDL-AMS implementation of the Advanced Compact MOSFET (ACM) model. This behavioral model aims at being a reference model for ACM code developers, helping to implement and maintain simulators specific code. Simulation results from classical testbenches are presented and confirm the correctness of the proposed model.

[symposium] ISDCS 2021 Hiroshima University

ISDCS 2021

3-5, March 2021

Hiroshima University, Higashi-Hiroshima, Japan

The ISDCS is a premium international forum for scholars, scientists, educators, students and engineers to exchange their latest findings and technological advances in the field of devices, circuits and systems.

Keynote Speakers

• Prof. Parthasarathi Chakrabarti, Director, IIEST Shibpur and Department of Electronics Engineering, IIT(BHU), India
  "Advanced Materials and Methods for Fabrication of Thin-film Transistor (TFT)-based Sensors"
• Prof. Shinji Kaneko, Hiroshima University, Japan
  "SDGs Initiatives at Hiroshima University: Integrating Global Strategy and Regional Vitalization"

Invited Speakers

• Prof. Sanatan Chattopadhyay, University of Calcutta, India
  "Voltage Assisted Quantum Dot Based MOS Devices for Electronic and Optoelectronic Applications"
• Prof. Partha Bhattacharya, IIEST Shibpur, India
  "Performance Improvement of Graphene Derivative based Gas sensors: Role of Functional Group Tuning and Ternary Junction Formation"
• Prof. Hafizur Rahaman, IIEST Shibpur, India
  "Tunnel Field Effect Transistors: Challenges and Opportunities"
• Prof. Nillohit Mukherjee, IIEST Shibpur, India
  "Metal Oxide Semiconductors with Carbon Nanomaterials for Efficient Supercapacitive Type Energy Storage Devices"
• Prof. Shigeyasu Uno, Ritsumeikan University, Japan
  "Electrochemical Impedance Sensor for Non-invasive Living Cell Monitoring toward CMOS Cell Culture Monitoring Platform"
• Mr. Shigeru Shiratake, Corporate Vice President, DRAM, Emerging Memory Process Integration and Device Technology Micron Technology, Inc., USA
  "Challenges for DRAM scaling and performance enhancement"
• Prof. Rihito Kuroda, Tohoku University, Japan
  TBD

Previous Conference:

• ISDCS 2020, Kolkata, India
• ISDCS 2019, Higashi-hiroshima, Japan
• ISDCS 2018, Kolkata, India

[PhD Thesis] Chiara ROSSI; A novel approach for SPICE modeling of light and radiation effects in ICs; Présentée le 29 janvier 2021 à EPFL Lausanne pour l’obtention du grade de Docteur ès Sciences; DOI:10.5075/epfl-thesis-8422 https://t.co/nKSO7dyI1I #semi https://t.co/ruaQTavMH1

[PhD Thesis] Chiara ROSSI; A novel approach for SPICE modeling of light and radiation effects in ICs; Présentée le 29 janvier 2021 à EPFL Lausanne pour l’obtention du grade de Docteur ès Sciences; DOI:10.5075/epfl-thesis-8422https://t.co/nKSO7dyI1I #semi pic.twitter.com/ruaQTavMH1

— Wladek Grabinski (@wladek60) February 11, 2021

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February 11, 2021 at 03:56PM
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[thesis] SPICE modeling of light and radiation effects in ICs

A novel approach for SPICE modeling of light and radiation effects in ICs

Chiara ROSSI

Présentée le 29 janvier 2021

à la Faculté des sciences et techniques de l’ingénieur Groupe de scientifiques IEL

Programme doctoral en microsystèmes et microélectronique

pour l’obtention du grade de Docteur ès Sciences

DOI:10.5075/epfl-thesis-8422

Modeling the interaction of ionizing radiation, either light or ions, in integrated circuits is essential for the development and optimization of optoelectronic devices and of radiation-tolerant circuits. Whereas for optical sensors photogenerated carriers play an essential role, high energy ionizing particles can be a severe issue for circuits, as they create high density of excess carriers in ICs substrate, causing parasitic signals. In particular, recent advances in CMOS scaling have made circuits more sensitive to errors and dysfunctions caused by radiation-induced currents, even at the ground level. TCAD simulations of excess carriers generated by light or radiation are not dedicated to large scale circuit simulations since only few devices can be simulated at a time and computation times are too long. Conversely, SPICE simulations are faster, but their accuracy is strictly dependent on the correctness of the compact models used to describe the devices, especially when dealing with photocurrents and parasitic radiation-induced currents.

The objective of this thesis is to develop a novel modeling approach for SPICE compatible simulations of electron-hole pairs generated by light and by high energy particles. The approach proposed in this work is based on the Generalized Lumped Devices, previously developed to simulate parasitic signals in High Voltage MOSFET ICs. Here, the model is extended to include excess carriers generation. The developed approach allows physics-based simulations of semiconductor structures, hit by light or radiation, that can be run in standard circuit simulators without the need for any empirical parameter, only relying on the technological and geometrical parameters of the structure, and without any predefined compact model. The model is based on a coarse mesh of the device to obtain an equivalent network of Generalized Lumped Devices. The latter predicts generation of excess carriers and their propagation, recombination and collection at circuit nodes through the definition of equivalent voltages, proportional to the excess carrier concentrations, and equivalent currents, proportional to the excess carrier gradients. The model is validated with commercial TCAD numerical simulations for different scenarios. Regarding light effects, the proposed strategy is applied to simulate various optoelectronic devices. Complete DC I-V characteristics of a solar cell and transient response of a photodiode are studied. Next, phototransistors are considered. After, a full pixel of a 3T-APS CMOS image sensor is analyzed. The photosensing device, described with Generalized Devices, is co-simulated with the in-pixel circuit, described with compact models. The impact of semiconductor parameters on pixel output and on crosstalk between adjacent pixels is predicted. Finally, radiation-induced soft errors in ICs are examined. Alpha particles at different energies hitting the substrate are simulated. Parasitic currents collected at contacts are studied as a function of particles position and energy. Funneling effect, which is a phenomenon specific to high injection, is also included in the model.

This work shows that the Generalized Lumped Devices approach can be successfully used for SPICE simulations of optoelectronic devices and for prediction of radiationinduced parasitic currents in ICs substrate. This thesis is a first step towards a complete and flexible tool for excess carriers modeling in standard circuit simulators.

Fig: Layout, mesh (gray dashed lines) and equivalent network of Generalized Lumped Devices (Generalized Homojunctions, Resistors and Diodes). The structure is uniformly illuminated from the left side, justifying a 1D discretization scheme.

[papers] Compact/SPICE Modeling

[1] Kotecha, Ramachandra M., Md Maksudul Hossain, Arman Rashid, Asif Emon, Yuzhi Zhang, and Homer Ei C. Alan Mantooth. "Compact Modeling of High-Voltage Gallium Nitride Power Semiconductor Devices for Advanced Power Electronics Design." IEEE Open Journal of Power Electronics (2021)

Fig: (a) Structure of field-plated GaN transistor (b) Equivalent sub-circuit topology

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[2] Sengupta, Sarmista, and Soumya Pandit. "A Unified Model of Drain Current Local Variability due to Channel Length Fluctuation for an n-Channel EδDC MOS Transistor." (researchsquare.com 2021).

Fig: Schematic diagram of an Epitaxial δ doped n-channel MOS transistor used for design purpose and the graded retrograde approximation of the channel profile of EδDC transistor.

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[3] Patil, C.V., Suma, M.S. Compact modeling of through silicon vias for thermal analysis in 3-D IC structures. Sādhanā 46, 35 (2021). https://doi.org/10.1007/s12046-020-01549-1

Fig: Through Silicon Via 2D representation and its equivalent subcircuit.