Feb 10, 2021

[papers] Compact/SPICE Modeling

[1] Kotecha, Ramachandra M., Md Maksudul Hossain, Arman Rashid, Asif Emon, Yuzhi Zhang, and Homer Ei C. Alan Mantooth. "Compact Modeling of High-Voltage Gallium Nitride Power Semiconductor Devices for Advanced Power Electronics Design." IEEE Open Journal of Power Electronics (2021)

Fig: (a) Structure of field-plated GaN transistor (b) Equivalent sub-circuit topology


[2] Sengupta, Sarmista, and Soumya Pandit. "A Unified Model of Drain Current Local Variability due to Channel Length Fluctuation for an n-Channel EδDC MOS Transistor." (researchsquare.com 2021).
Fig: Schematic diagram of an Epitaxial δ doped n-channel MOS transistor used for design purpose and the graded retrograde approximation of the channel profile of EδDC transistor.


[3] Patil, C.V., Suma, M.S. Compact modeling of through silicon vias for thermal analysis in 3-D IC structures. Sādhanā 46, 35 (2021). https://doi.org/10.1007/s12046-020-01549-1
Fig: Through Silicon Via 2D representation and its equivalent subcircuit.







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