Apr 18, 2016

CMC Leadership

CMC Leadership represents the industry’s top semiconductor design companies and manufacturers.

In their role, they provide overall direction and guidance to the efforts of the members and the developers involved in CMC working groups.


Chair: Dr. Peter Lee, Micron Technology


Vice-Chair: Dr. Josef Watts, GLOBALFOUNDRIES


Secretary Richard Williams, IBM


Treasurer: Takeshi Naito, Toshiba

Apr 15, 2016

A review of electrical characterization techniques for ultrathin FDSOI materials and devices https://t.co/TCICVWiFdW #papers #feedly


from Twitter https://twitter.com/wladek60

April 15, 2016 at 10:13PM
via IFTTT

A new approach to compact semiconductor device modelling with Qucs Verilog-A analogue module synthesis https://t.co/IsNSKkSLtL #papers


from Twitter https://twitter.com/wladek60

April 15, 2016 at 10:12PM
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Apr 14, 2016

Characterization and modeling of drain current local variability in 28 and 14nm FDSOI nMOSFETs https://t.co/3bOVSMHjON #papers


from Twitter https://twitter.com/wladek60

April 14, 2016 at 10:30PM
via IFTTT

[mos-ak] [press note] Spring MOS-AK Workshop @ cfaed

The MOS-AK Association held its annual spring compact modeling and Verilog-A standardization workshop at the Center for Advancing Electronics Dresden (cfaed), TU Dresden, on March 18, 2016

Published on  in MARTIN CLAUS GROUP <https://cfaed.tu-dresden.de/claus-group/news_reader/spring-mos-ak-workshop-cfaed>


More than 40 registered academic researchers and modeling engineers attended two sessions to hear 10 technical compact modeling engineering talks. This year, compact modeling of emerging technologies such as organic transistors, carbon nanotube transistors and chemical transistors were in focus with contributions from industry and academia. "The talks and discussions revealed an increasing interest of industry and system designers to evaluate the performance and applicability of emerging technologies," summarized cfaed group leader Dr.-Ing. Martin Claus, local organizer of the workshop in Dresden. He pointed out that "compact models bridge the gap between technology development and applications by providing useful insights for guiding the technology development and by enabling circuit design." MOS-AK is a dedicated forum for engineers and scientists working in that field. The MOS-AK Dresden workshop presentations are available here: http://www.mos-ak.org/dresden_2016/

The event received full sponsorship from leading industrial partners as well as technical program promotion by the cfaed, IEEE WIE Swiss Chapter, IEEE EDS German Chapter, NEEDS Nanohub as well as Europractice.

The MOS-AK Association is coordinating several upcoming modeling events focusing on the Verilog-A compact model standardization as well as open source FOSS TCAD/EDA simulation tool developments: 

Future MOS-AK workshops

IEEE EDS Mini-Colloquium on CM

  • April 9, 2016 IIT Roorkee (IN)

MIXDES Compact Modeling Session

  • June 23-25, 2016 Lodz (PL)

IEEE EDS Mini-Colloquium on GaN HEMT

  • June 22, 2016, prior MIXDES 2016 Conference

4th Training Course on CM (TCCM)

  • June 27-28, 2016 Tarragona (SP)

In the meantime, please also visit www.mos-ak.org where the discussions of all compact/SPICE modeling topics and its Verilog-A standardization will be continued.


About MOS-AK Association: The MOS-AK is a HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization. The MOS-AK workshops play a central role in developing a common modeling interface among foundries, CAD vendors, IC designers and model developers by contributing and promoting different elements of compact model standardization and related tools for model development, validation and its implementation and distribution.

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