Adhi Cahyo Wijaya ,Jyh-Chyurn Guo
Cryogenic mm-Wave Device Optimization and Modeling with Temperature and Layout Dependent Effects in Multifinger nMOSFETs and Si Substrate
Journal of the EDS, Vol. 14, 2026 935
Department of Electrical Engineering, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan
ABSTRACT: In this paper, cryogenic device optimization aimed at super-450GHz fT and fMAX and new equivalent circuit models with layout- and temperature-dependent effects (LDE and TDE) over 300K∼4K are presented. Open and short pad models incorporating TDE have been developed and verified by experimental data, showing extremely high Si substrate resistance (Rsi) at below 25K and the minimum Rsiat 77K followed by a turn around at above 77K. Interestingly, for active devices at on-state, carriers freezeout in the Si substrate at cryogenic temperature is suppressed, which motivates development of enhanced pad models for accurate deembedding and simulation of on-Si-chip devices and mm-wave circuits over 300K∼4K. For sub-40nm nMOSFETs with respectively optimized multi-finger (MF) layouts, the maximum fT and fMAX at 4K can reach up to 447GHz and 95 GHz.
FIG: (a) The full equivalent circuit model (b) physical representation for a full structure with intrinsic MOSFET model and enhanced pad model by adding Rsi0(g,d) and Csi0(g,d) for accurate simulation and deembedding at cryo-temp.
Acknowledgement: This work was supported in part by the National Science and Technology Council (NSTC) under Grant NSTC-114-2221-E-A49-206.
