[webinar] Open Source EDA Development of Chips in Europe

Professor Marie-Minerve Louerat, Sorbonne Université-CNRS, GoIT Project, has announced the upcoming webinar on Open Source EDA fostering development of Chips in Europe

"Introduction to the open-source EDA ecosystem"

online webinar to foster engagement for Open-Source EDA and Open-Silicon development in Europe

📅 Tuesday May 14, 2024 🕙 10:00-12:00 (CEST) with Free Online Registration

Workshop Agenda:

• European Semiconductor Design Ecosystem (10 min)
• Matthew Xuereb, European Commission
• Open-Source Semiconductor Ecosystem (15 min)
• Luca Alloatti, Free Silicon Foundation (I) ETS
• Open-Source EDA Software and Semiconductor Design (15 min)
• Jean-Paul Chaput, Sorbonne Université, Coriolis Foundation
• European Roadmap on the Advancement of Open-Source EDA Tools, next steps (15 min)
• Rihards Novickis, Latvian Institute of Electronics and Computer Science
• Q&A session / Feedback (up to 1 hour)

NB: 2nd event - to be announced

Location: Paris, Sorbonne Université

📅 Date: June 18, 2024, before FSiC2024 conference

Free Silicon Foundation Roadmap

The Free Silicon Foundation (F-Si) has prepared a list of recommendations and a roadmap for the European Commission for the development of open-source silicon in the EU. 

The full text is available to download here 

Executive summary 

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Chapter 1: Table of Contents

After a brief introduction (Chapter 2) which defines the necessary terminology and introduces the political background (Chapter 3), in Chapter 4 we argue that open-source Electronic Design Automation (EDA) tools and open-source silicon are essential instruments to achieve many of the goals set by the Chips Act. This chapter does not provide any recommendations yet.

Chapter 5 we analyse the “Design Platform” foreseen by the Chips Act in the light of the feedback obtained by interrogating multiple European SMEs involved in chip design. Potential problems were identified with the foreseen cloud-based infrastructures. These are related with security, privacy, the too large spectrum of tools, forced upgrades, increased control by EDA vendors, and increased risk of discovery of patent infringement. To mitigate these problems we recommend to support, besides cloud installations, also local EDA installations, and we recommend to support open-source EDA flows besides the commercial flows.

Chapter 6 we analyse the role of standards and standards-setting bodies in the context of open-source. In particular, we highlight how open-source development has needs which are substantially different from the mainstream industrial approach to standardization. We highlight in particular a set of necessary conditions that, in our experience, standards must fulfil in order to be adopted by the open-source community.

Chapter 7 we discuss academia. We argue that academia can and should play a significant role in the development of open-source EDA tools and open-source silicon. For fostering open-source development in universities, we recommend that the metrics to evaluate academics should include open-source projects aside to publications, citations, etc. Next, we highlight how there are two classes of academics, which are both essential: developers of EDA tools and users of EDA tools. Given the near complete disappearance of the former, we recommend that a new generation of professors is hired to develop open-source EDA tools and to revive the corresponding knowledge in Europe. In this Chapter we finally highlight how people who have not been exposed to open-source solutions often don’t appreciate its potential therefore creating a cultural bias. In conclusion, also because of other conflicts of interest, we recommend introducing new and independent personnel in academia.

Chapter 8 we present an open letter about ecological sustainability. The signatories of this letter recommend: 

1. more sober technology, 

2. the “6Rs” (Refurbish, Reuse, Repair, Reliability, Reduce, Recycle) for electronic devices, 

3. external and independent auditors for Life Cycle Assessments (LCAs), 

4. encouraging world-wide regulations to limit the environmental impact in the ICT sector.

Chapter 9 we discuss patent threats and possible upcoming problems for open-source development. Unfortunately, we have no consolidated recommendations yet.

Chapter 10 we briefly discuss possible implications of Artificial Intelligence on chip design. We warn that the advent of AI might produce an increased silicon-technology gap between owners of AI and the others. We recommend putting in place mechanisms to prevent a further power unbalance between large and small actors. A possible mechanism consists of guaranteeing a fully open (i.e. down to silicon) development of AI. 

Chapter 11 we discuss the Cyber Resilience Act (CRA) and we recommend that: 

1. the concept of open-silicon is added to the CRA, and 

2. open-silicon is recognized as a key ingredient to achieve some of the hardware cybersecurity goals.

Chapter 12 we finally present a roadmap for open-source silicon development. First we make a list of open-silicon chips which can be realised immediately or in the near future and highlight their impact. We then recommend to rapidly finance projects similar (in scope and management) to the DARPA OpenRoad project for open-source EDA development. This is our strongest and most important recommendation. Next, we list all political handles that policy can operate to foster open-silicon development. Finally, we present a recommended timeline for the different activities and we conclude.

Acknowledgements

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This document was prepared with help from many people working in university, small organizations and SMEs. Starting from the end of September 2023, it has been reviewed by about twenty people. We are very grateful to all of them for their inputs and feedback.

Funding and disclaimer 

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This work is funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them.

Project name: “Go IT!” ID number: 101070660

Starting Framework of the IRDS Roadmap

IEEE has announced the next milestone phase in the development of the International Roadmap for Devices and Systems (IRDS), an IEEE Standards Association (IEEE-SA) Industry Connections (IC) Program sponsored by the IEEE Rebooting Computing (IEEE RC) Initiative with the launch of a series of nine white papers that reinforce the initiative’s core mission and vision for the future of the computing industry. The white papers also identify industry challenges and solutions that guide and support future roadmaps created by IRDS [read more...]

The series of white papers delivers the starting framework of the IRDS roadmap - and through the sponsorship of IEEE RC—will inform the various roadmap teams in the broader task of mapping the devices’ and systems’ ecosystem:

• Applications Benchmarking
• More Moore
• Beyond CMOS (Emerging Research Devices)
• Outside System Connectivity
• Factory Integration
• Metrology
• Environment, Safety, and Health
• Yield Enhancement
• System and Architecture

The IRDS leadership team hosted a winter workshop and kick-off meeting at the Georgia Institute of Technology on 1-2 December 2016. Key discoveries from the workshop included the international focus teams’ plans and focus topics for the 2017 roadmap, top-level needs and challenges, and linkages among the teams. Additionally, the IRDS leadership invited presentations from the European and Japanese roadmap initiatives. This resulted in the 2017 IRDS global membership expanding to include team members from the “NanoElectronics Roadmap for Europe: Identification and Dissemination” (NEREID) sponsored by the European Semiconductor Industry Association (ESIA), and the “Systems and Design Roadmap of Japan” (SDRJ) sponsored by the Japan Society of Applied Physics (JSAP).

The IRDS team and its supporters will convene 1-3 April 2017 in Monterey, California, for the Spring IRDS Workshop, which is part of the 2017 IEEE International Reliability Physics Symposium (IRPS). The team will meet again for the Fall IRDS Conference in partnership with the 2017 IEEE International Conference on Rebooting Computing (ICRC) scheduled for 6-7 November 2017 in Washington, D.C. More information on both events can be found here.

IEEE RC is a program of IEEE Future Directions, designed to develop and share educational tools, events, and content for emerging technologies [read more...]

Qucs Roadmap

The QUCS Roadmap should serve as base to track the status of each action point. Enhancements can be handled in two ways:

• For simpler enhancements an issue/bug ticket shall be created and referenced back here. The pertinent discussion and documentation should be done on the body of each ticket.
• For more complex enhancements a Qucs Enhancement Proposal should be created and reference back here.

The open action points can be further categorized concerning the difficulty or amount of work as (Easy, Medium, Hard) and priority (0-3, 0 is the highest). See the Port to Qt4 / Qt5 for an example. Tickets will be tracked individually and assigned to milestones leading to stable releases.

Stage 1 - Simple GUI and simulator  

Stage 2 - Implementation of powerful circuit analysis tools

Stage 3 - Support for more design and synthesis tools  

Stage 4 - Implementation of industry standard device models

Stage 5 - Design realization, production, verification

Read more about QUCS Roadmap

The ITRS, 2013 Edition is now online.

 The link below will take you to the site for the summary information
http://www.itrs.net/Links/2013ITRS/Summary2013.htm

 For the full edition details, follow this link
http://www.itrs.net/Links/2013ITRS/Home2013.htm

[read more...]