[paper] A surface potential large signal model for AlGaN/GaN HEMTs

A surface potential large signal model for AlGaN/GaN HEMTs

Q. Wu, Y. Xu, Z. Wen, Y. Wang and R. Xu

2016 11th EuMIC, London, UK, 2016, pp. 349-352

doi: 10.1109/EuMIC.2016.7777562

Abstract: This paper presents an accurate analytical surface-potential-based compact model for AlGaN/GaN HEMTs for SPICE-like circuit simulation. Considering the important energy level E₀, an easy-implemented analytical continuous expression for the fermi level position E_f was deduced to obtain the surface potential (SP) φ_s. Then analytical core models for intrinsic charge and drain current are derived based on φ_s. The model has been implemented in Agilent ADS by using symbolic defined device. Excellent agreement of DC I-V, fundamental output power, power added efficiency and gain is obtained for the first time compared with measurement results. Moreover, the effect of physical parameter such as the barrier thickness d on device characteristic is researched on the basic of this model. The results show that the proposed physical based model can be useful for technological parameters analysis and optimization of process.

[read more: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7777562&isnumber=7777458]

Best Practices for Compact Modeling in Verilog-A

Mcandrew, C.C.; Coram, G.J.; Gullapalli, K.K.; Jones, J.R.; Nagel, L.; Roy, A.S.; Roychowdhury, J.; Scholten, A.J.; Smit, G.D.J.; Wang, X.; Yoshitomi, S., "Best Practices for Compact Modeling in Verilog-A," Electron Devices Society, IEEE Journal of the , vol.PP, no.99, pp.1,1

doi: 10.1109/JEDS.2015.2455342

Abstract: Verilog-A is the de facto standard language that the semiconductor industry uses to define compact models. Unfortunately, it is easy to write models poorly in Verilog-A, and this can lead to unphysical model behavior, poor convergence, and difficulty in understanding and maintaining model codes. This paper details best practices for writing compact models in Verilog-A, to try to help raise the quality of compact modeling throughout the industry.

keywords: Capacitance, Computational modeling, Convergence, Hardware design languages, Integrated circuit modeling, Mathematical model, Numerical models

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REFERENCES[1] S. Liu, K. C. Hsu, and P. Subramaniam, “ADMIT-ADVICE modeling interface tool,” Proc. IEEE Customs Integrated Circuits Conf., pp. 6.6.1- 6.6.4, 1988.
[2] M. Vlach, “Modeling and simulation with Saber,” Proc. 3rd Annual ASIC Seminar and Exhibit, pp. T11.1-T11.9, 1990.
[3] E. McReynolds, personal communication, circa 1995.
[4] E. Christen and K. Bakalar, “VHDL-AMS—A hardware description language for analog and mixed-signal applications,” IEEE Trans. Circuits and Systems II, vol. 46, no. 10, pp. 1263-1272, Oct. 1999.
[5] [Online]: http://www.accellera.org/downloads/standards/v-ams (accessed June, 2015).
[6] L. Lemaitre, G. Coram, C. McAndrew, and K. Kundert, “Extensions to Verilog-A to support compact device modeling,” Proc. IEEE Behavioral Modeling and Simulation Workshop, pp. 134-138, Oct. 2003.
[7] L. Zhou, B. P. Hu, B. Wan, and C.-J. R. Shi, “Rapid BSIM model implementation with VHDL-AMS/Verilog-AMS and MCAST compact
model compiler,” IEEE Int. SOC Conf., pp. 285-286, Sep. 2003.
[8] G. Coram and M. Ding, “Recent achievements in Verilog-A compact modeling,” MOS-AK Workshop, Dec. 2009.
[9] G. Coram, “How to (and how not to) write a compact model in Verilog- A,” Proc. IEEE Behavioral Modeling a Simulation Workshop, pp. 97-106, Oct. 2004.
[10] G. Coram and C. C. McAndrew, “Verilog-A for compact modeling: best practices for high-quality model authoring,” Workshop on Compact Modeling for RF, Sep. 2005.
[11] G. Coram, “Verilog-A: an introduction for compact modelers,” MOS-AK Workshop, Sep. 2006.
[12] M. Mierzwinski, P. O’Halloran, and B. Troyanovsky, “Developing and releasing compact models using Verilog-A,” MOS-AK Workshop, Dec. 2008.
[13] G. Depeyrot and F. Poullet, “Guidelines for Verilog-A compact model coding,” MOS-AK Workshop, Sep. 2009.
[14] M. Mierzwinski, P. O’Halloran, and B. Troyanovsky, “Practical considerations for developing, debugging, and releasing Verilog-A models,” MOS-AK Workshop, Dec. 2009.
[15] C. C. McAndrew and G. Coram, “General and junction primitives for Verilog-A compact models,” nanoHUB. doi:10.4231/D3G15TC2J, 2015.
[16] C. C. McAndrew, “R3,” nanoHUB. doi:10.4231/D3QB9V64G, 2014.
[17] L. W. Nagel, SPICE2: A Computer Program to Simulate Semiconductor Circuits, Memo. ERL-M520, Univ. California, Berkeley, May 1975.
[18] X. Li, W. Wu, G. Gildenblat, C. C. McAndrew, and A. J. Scholten, “Benchmark tests for MOSFET compact models,” in Compact Modeling: Principles, Techniques and Applications, G. Gildenblat (Ed), Springer, pp. 75-104, 2010
[19] Y. Tsividis and C. McAndrew, Operation and Modeling of the MOS Transistor, 3rd ed., New York: Oxford University Press, 2011.
[20] [Online]: http://physics.nist.gov/cuu/Constants/Citations/Search.html (accessed June, 2015)
[21] A. Parker, “Getting to the heart of the matter,” IEEE Microwave Magazine, vol. 16, no. 3, pp. 76-86, Apr. 2015. [22] H. K. Dirks, Kapazit¨atskoeffizienten nichtlinearer dissipativer Systeme, Habilitation Theses, RWTH Aachen University, 1998.
[23] A. C. T. Aarts, R. van der Hout, J. C. J. Paasschens, A. J. Scholten, M. B. Willemsen, and D. B. M. Klaassen, “New fundamental insights into capacitance modeling of laterally nonuniform MOS devices,” IEEE Trans. Electron Dev., vol. 53, no. 2, pp. 270-278, Feb. 2006.
[24] C. C. McAndrew, “Practical modeling for circuit simulation,” IEEE J. Solid-State Circuits, vol. 33, no. 3, pp. 439-448, Mar. 1998.
[25] C. C. McAndrew, “Useful numerical techniques for compact modeling,” Proc. IEEE ICMTS, pp. 121-126, Apr. 2002. [26] K. Kundert, “Hidden state in SpectreRF,” [Online]: http://http://www.designers-guide.org/analysis/hidden-state.pdf (accessed June, 2015)
[27] R. K. Johnson, The Elements of MATLAB R⃝ Style, Cambridge University Press, 2011.
[28] M. Driessen and D. B. M. Klaassen, personal communication, 2006.
[29] [Online]: https://nanohub.org/groups/needs (accessed June, 2015)
[30] L. Lemaitre, C. C. McAndrew, and S. Hamm, “ADMS-automated device model synthesizer,” Proc. IEEE CICC, pp. 27-30, May 2002.
[31] [Online]: http://sourceforge.net/projects/mot-adms/ (accessed June, 2015)