[virtual] IEEE EDS DL Mini-Colloquium at MIXDES Wroclaw

EDS Distinguished Lecturer Mini-Colloquium 

"Semiconductor-based sensors - technology, modeling, applications" 

(virtual at MIXDES), June 27, 2020

Chairs: Wladek Grabinski, Daniel Tomaszewski

10.00-10.45	Arokia Nathan "Ultralow Power, High-Resolution Sensor Interfaces" EDS Distinguished Lecturer, Cambridge Touch Technologies, UK; E-mail: an299@cam.ac.uk
10.45-11.30	Mike Schwarz "Sensor Design – From Prototype to Series" Robert Bosch GmbH, 72703 Reutlingen,Germany; E-mail: Mike.Schwarz@de.bosch.com
12.00-12.45	Benjamin Iñíguez "Compact Modeling and Parameter Extraction for Oxide and Organic Thin Film Transistors (TFTs) from 150K to 350K" EDS Distinguished Lecturer, Department of Electrical, Electronics Engineering and Automatic Control Engineering, Universitat Rovira i Virgili, 43007 Tarragona, Spain; E-mail: benjamin.iniguez@urv.cat
12.45-13.30	Teoder Gotszalk " Microsystem Electronics and Photonics " Faculty of Microsystem Electronics and Photonics, Wroclaw University of Technology, Poland; E-mail: teodor.gotszalk@pwr.edu.pl
13.30-14.15	Mina Rais-Zadeh "Phase change electro-optical devices for space applications" (recorded) EDS Distinguished Lecturer, NASA Jet Propulsion Lab., California Institute of Techn., USA; E-mail: minar@umich.edu

[paper] Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI’s Using Universal Rad-SPICE MOSFET Model

Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI’s 

Using Universal Rad-SPICE MOSFET Model

Konstantin O. Petrosyants, Lev M. Sambursky, Igor A. Kharitonov, Boris G. Lvov

J Electron Test (2017)

doi:10.1007/s10836-016-5635-8

Abstract: The methodology of modeling and simulation of environmentally induced faults in radiation hardened SOI/SOS CMOS IC’s is presented. It is realized at three levels: CMOS devices – typical analog or digital circuit fragments – complete IC’s. For this purpose, a universal compact SOI/SOS MOSFET model for SPICE simulation software with account for TID, dose rate and single event effects is developed. The model parameters extraction procedure is described in great depth taking into consideration radiation effects and peculiarities of novel radiation-hardened (RH) SOI/SOS MOS structures. Examples of radiation-induced fault simulation in analog and digital SOI/SOS CMOS LSI’s are presented for different types of radiation influence. The simulation results show the difference with experimental data not larger than 10–20% for all types of radiation.

The electrical schematics of SOS CMOS opamp and 4-bit counter are presented; two variants of either macromodel were used for body-tied partially-depleted transistors: a) core EKV-SOI/ BSIMSOI model; b) EKV-RAD/ BSIMSOI-RAD macromodel. [read more...]