[paper] Single Gate Extended Source Tunnel FET

Jagritee Talukdar^a, Gopal Rawat^b, Bijit Choudhuri^a, Kunal Singh^c, Kavicharan Mummaneni^a

Device Physics Based Analytical Modeling for Electrical Characteristics of Single Gate Extended Source Tunnel FET (SG-ESTFET)

Superlattices and Microstructures (2020): 106725

DOI: 10.1016/j.spmi.2020.106725

^aDECE, NIT Silchar, Assam, India
^bDECE, NIT Hamirpur, Himachal Pradesh, India
^cDECE, NIT Jamshedpur, Jharkhand, India

Abstract: In this paper, a 2D analytical model for Single Gate Extended Source Tunnel FET has been developed which is based on the solution of Poisson’s equation simplified using parabolic approximation method. Different electrical characteristics of device physics such as surface potential, drain current, lateral, and vertical electric field of SG-ESTFET are studied incorporating various parameters like mole fraction of SiGe layer, gate dielectric constants, etc. Furthermore, in modeling and simulation, the depletion region of the drain side is included considering the effect of the fringing field. The comercial TCAD device simulator has been used to verify the accuracy and validity of the proposed analytical model for various electrical parameters such as gate to source voltage, mole fraction, and gate dielectric constants. The validity of the proposed model is confirmed by observing a decent agreement between modeling and simulation. The proposed compact model delivers quick and accurate values of various performance parameters.

Fig: 2D schematic device structure of SG-ESTFET