[paper] Roadmapping of Nanoelectronics for the New Electronics Industry

Paolo Gargini¹,Francis Balestra², and Yoshihiro Hayashi³

Roadmapping of Nanoelectronics for the New Electronics Industry

Appl. Sci. 2022, 12(1), 308

DOI: 10.3390/app12010308

Received: 4 November 2021 / Revised: 17 December 2021 

Accepted: 20 December 2021 / Published: 29 December 2021

Academic Editor: Gerard Ghibaudo; This article belongs to the Special Issue Advances in Microelectronic Materials, Processes and Devices

   
1IEEE IRDS, (US)
2 CNRS, Grenoble INP (F)
3 Keio University, Tokyo (J)

Abstract: This paper is dedicated to a review of the international effort to map the future of nanoelectronics from materials to systems for the new electronics industry. The following sections are highlighted: the Roadmap structure with the international teams, the methodology and historical evolution, the various eras of scaling, the new ecosystems and computer industry, the evolving supply chain, the development of SoC and SiP, the advent of the Internet of Everything and the 5G communications, the dramatic increase of data centers, the power challenge, the technology fusion, heterogeneous and system integration, the emerging technologies, devices and computing architectures, and the main challenges for future applications.

FIG: 40 Years of Microprocessor Trend Data

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[paper] Noise Degradation and Recovery in Gamma-irradiated SOI nMOSFET

S.Amora^b, V.Kilchytska^a, F.Tounsi^a, N.André^a, M.Machhout^b, L.A.Francis^a, D.Flandre^a

Characteristics of noise degradation and recovery in gamma-irradiated SOI nMOSFET

with in-situ thermal annealing

Solid-State Electronics; 108300; online 7 April 2022, 

DOI: 10.1016/j.sse.2022.108300

   
a SMALL, ICTEAM Institute, Université catholique de Louvain (B)
b Faculté des Sciences de Université de Monastir (TN)

Abstract: This paper demonstrates a procedure for complete in-situ recovery of on-membrane CMOS devices from total ionizing dose (TID) defects induced by gamma radiation. Several annealing steps were applied using an integrated micro-heater with a maximum temperature of 365°C. The electrical characteristics of the on-membrane nMOSFET are recorded prior and during irradiation (up to 348 krad (Si)), as well as after each step of the in-situ thermal annealing. High-resolution current sampling measurements reveal the presence of oxide defects after irradiation, with a clear dominant single-trap signature in the random telegraph noise (RTN) traces. Drain current over time measurements are used for the trap identification and further for the defects' parameters extraction. The power spectral density (PSD) curves confirm a clear dominance of the RTN behavior in the low-frequency noise. A radiation-induced oxide trap is detected at 5.4 nm from the Si-SiO2 interface, with an energy of 0.086 eV from the Fermi level in the bandgap. After annealing, the RTN behavior vanishes with a further important reduction of flicker noise. Low-frequency noise measurements of the transistor confirmed the neutralization of oxide defects after annealing. The electro-thermal annealing of the nMOSFET allows a total recovery of its original characteristics after being severely degraded by radiation-induced defects.

Fig: Device under test : (a) cross-section schematic, (b) microscopic front view

showing the membrane and other embedded elements

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The #CHIPS for America #Act is a Blueprint for Semiconductor Leadership, but for whom?

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