Laboratoire d'Informatique de Paris 6 (LIP6) Sorbonne and CNRS will attend Open Source Experience event on 6-7 December in Paris to present GoIT project
Come and join the European open source community meeting!!
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Nov 10, 2023
Nov 6, 2023
Free Silicon Foundation Roadmap
The Free Silicon Foundation (F-Si) has prepared a list of recommendations and a roadmap for the European Commission for the development of open-source silicon in the EU.
The full text is available to download here
Chapter 1: Table of Contents
After a brief introduction (Chapter 2) which defines the necessary terminology and introduces the political background (Chapter 3), in Chapter 4 we argue that open-source Electronic Design Automation (EDA) tools and open-source silicon are essential instruments to achieve many of the goals set by the Chips Act. This chapter does not provide any recommendations yet.
Chapter 5 we analyse the “Design Platform” foreseen by the Chips Act in the light of the feedback obtained by interrogating multiple European SMEs involved in chip design. Potential problems were identified with the foreseen cloud-based infrastructures. These are related with security, privacy, the too large spectrum of tools, forced upgrades, increased control by EDA vendors, and increased risk of discovery of patent infringement. To mitigate these problems we recommend to support, besides cloud installations, also local EDA installations, and we recommend to support open-source EDA flows besides the commercial flows.
Chapter 6 we analyse the role of standards and standards-setting bodies in the context of open-source. In particular, we highlight how open-source development has needs which are substantially different from the mainstream industrial approach to standardization. We highlight in particular a set of necessary conditions that, in our experience, standards must fulfil in order to be adopted by the open-source community.
Chapter 7 we discuss academia. We argue that academia can and should play a significant role in the development of open-source EDA tools and open-source silicon. For fostering open-source development in universities, we recommend that the metrics to evaluate academics should include open-source projects aside to publications, citations, etc. Next, we highlight how there are two classes of academics, which are both essential: developers of EDA tools and users of EDA tools. Given the near complete disappearance of the former, we recommend that a new generation of professors is hired to develop open-source EDA tools and to revive the corresponding knowledge in Europe. In this Chapter we finally highlight how people who have not been exposed to open-source solutions often don’t appreciate its potential therefore creating a cultural bias. In conclusion, also because of other conflicts of interest, we recommend introducing new and independent personnel in academia.
Chapter 8 we present an open letter about ecological sustainability. The signatories of this letter recommend:
1. more sober technology,2. the “6Rs” (Refurbish, Reuse, Repair, Reliability, Reduce, Recycle) for electronic devices,3. external and independent auditors for Life Cycle Assessments (LCAs),4. encouraging world-wide regulations to limit the environmental impact in the ICT sector.
Chapter 9 we discuss patent threats and possible upcoming problems for open-source development. Unfortunately, we have no consolidated recommendations yet.
Chapter 10 we briefly discuss possible implications of Artificial Intelligence on chip design. We warn that the advent of AI might produce an increased silicon-technology gap between owners of AI and the others. We recommend putting in place mechanisms to prevent a further power unbalance between large and small actors. A possible mechanism consists of guaranteeing a fully open (i.e. down to silicon) development of AI.
Chapter 11 we discuss the Cyber Resilience Act (CRA) and we recommend that:
1. the concept of open-silicon is added to the CRA, and2. open-silicon is recognized as a key ingredient to achieve some of the hardware cybersecurity goals.
Chapter 12 we finally present a roadmap for open-source silicon development. First we make a list of open-silicon chips which can be realised immediately or in the near future and highlight their impact. We then recommend to rapidly finance projects similar (in scope and management) to the DARPA OpenRoad project for open-source EDA development. This is our strongest and most important recommendation. Next, we list all political handles that policy can operate to foster open-silicon development. Finally, we present a recommended timeline for the different activities and we conclude.
Acknowledgements
This document was prepared with help from many people working in university, small organizations and SMEs. Starting from the end of September 2023, it has been reviewed by about twenty people. We are very grateful to all of them for their inputs and feedback.
Funding and disclaimer
This work is funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the European Commission. Neither the European Union nor the European Commission can be held responsible for them.
Project name: “Go IT!” ID number: 101070660
Verilog-AMS in Gnucap
Mixed-Signal Modelling and Simulation with Verilog-AMS
Verilog-AMS is a standardised modelling language widely used in analog and mixed-signal design, but without an open reference implementation. The language supports high-level behavioural descriptions as well as structural descriptions of systems and components. This Project will make substantial progress towards a Gnucap based free/libre Verilog-AMS implementation. Gnucap is a modular mixed-signal circuit simulator, and has been released under a copyleft license with the intent to avoid patent issues. Gnucap provides partial support for structural Verilog and encompasses an analog modelling language that has influenced the Verilog standards. We will enhance data structures and algorithms in Gnucap, and improve Verilog support on the simulator level. We will implement a Verilog-AMS behavioural model generator targetting Gnucap with the intent to support simulators with similar architecture later on. The project's own website:
Task 1. modelgen-verilog: Provide a replacement for ADMSTask 2. Verilog-AMS compliance on the simulator levelTask 3. Compiler optimisations
Acknowledgement: This project was funded through the NGI0 Entrust Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101069594.
Nov 3, 2023
The first IC designed in B&H has been fabricated
On 18 May 2023, the Faculty of Electrical Engineering of the University of Banja Luka, Bosnia and Herzegovina, presented the first integrated chip of semiconductor technology, which represents the most sophisticated technological process.
The details of that development are in the following references:
FIG: IC oscillates as per design specification and pre/post-layout simulation
Faculty of Electrical Engineering has become one of the higher education institutions where one of the most important engineering disciplines of today and the future is studied according to the best world programmes, with the direct application of industrial standards in teaching, thus preparing the next generation of engineers to be the flywheel of economic revival through innovation.
It took students and professors at the Faculty of Electrical Engineering five years to develop the first integrated chip. Student Vanja Žerić is one of the innovators of this idea, and he states that the knowledge gained was a prerequisite to start the production.
"We are talking about two chips, one of which is a stabilizer or a voltage regulator that has the ability to stabilize the voltage from 1.8 to 3.3 volts. The second was an oscillator that is essential for a chip like this.'', Vanja said.
Assistant Professor of the Faculty of Electrical Engineering, Aleksandar Pajkanović, PhD, who teaches several courses in the field of chip development at the Department of Electronics, pointed out that the CMOS technological process is the most sophisticated technology that exists in the world, and that it is commercially available, and that they have mastered it and demonstrated it through the implementation of the chip.
"It is particularly important to point out that this technology is significant as a military and industrial strategic resource as well as in higher education, and the most important thing is that we are now among world universities that study this field. It is usual for the implementation of chips to be done in doctoral studies, but with great efforts we managed to do it with third-year students. This chip is not intended for commercialization, as we developed it to demonstrate the capability and mastery of such advanced technology." Prof. Pajkanović stressed.
The details of that development are in the following references:
[1] A. Pajkanovic, “On the Application of Free CAD Software to Electronic Circuit Curricula”, 3rd IcETRAN2016, Zlatibor, Serbia, 2016[2] A. Pajkanovic and Z. Ivanovic, “A Report on Recent Development in Application of Free CAD Software to IC Curricula,” 5th IcETRAN2018, Palic, Serbia, 2018.[3] A. Pajkanovic, “Introducing Chisel to IC Design Curriculum at the Faculty of Electrical Engineering in Banja Luka”, 8th RISCV Workshop, Barcelona, Spain, 2018[4] A. Pajkanovic, “CMOS IC Design from Schematic Level to Silicon within IC Curricula Using Free CAD Software”, INDEL2020, Banja Luka, B&H, 2020.[5] A. Pajkanovic, “Free/Open Source EDA Tools Application in Digital IC Design Curricula”, 8th IcETRAN2021, Stanisici, B&H, 2021.[6] A. Pajkanovic, “Open Source CMOS General Purpose Operational Amplifier", MIEL 2021[7] A. Pajkanovic, "Free IC Design in Education", PSSOH 2021
Nov 2, 2023
[workshop] FreeCAD 3D parametric modeler
PSG COLLEGE OF TECHNOLOGY, COIMBATORE
9 DECEMBER, 2023
About the FreeCAD
FreeCAD is a general purpose open source parametric 3D CAD modeller. FreeCAD is aimed directly at mechanical engineering and product design but, being very generic, also fits in a wider range of uses around engineering, such as architecture, finite element analysis, 3D printing, and other tasks. FreeCAD offers tools to produce, export and edit solid, full-precision models, export them for 3D printing or CNC machining, create 2D drawings and views of your models, perform analyses such as Finite Element Analyses, or export model data such as quantities or bills of materials. FreeCAD features tools similar to other popular CAD packages and therefore also falls into the category of CAD, PLM, CAx, CAE and BIM. It is a feature based parametric modeler with a modular software architecture, making it possible to provide additional functionality without modifying the core system. As with other CAD modelers, it has many 2D components in order to sketch planar shapes or create production drawings. FreeCAD is also fundamentally a social project, as it is developed and maintained by a community of developers and users united by their passion for FreeCAD. In precise FreeCAD is:
- Made to build for the real world
- A powerful solid-based geometry kernel
- A wi(l)dly parametric environment
- File formats frenzy
- A parametric constraints-based 2D sketcher
- A large (and growing) multi-specialty ecosystem
The workshop will be conducted through spoken tutorial videos of 10 minutes duration. After the workshop, a link for the video tutorials will be shared to the participants for further learning. As it is an open source software, FreeCAD can be used free of cost for educational and industrial design purposes. Participants of this workshop can install this software on their laptop during this workshop and take it with them. Target participants of this workshop include: practicing engineers, faculty members, research scholars and students.
Registration details
The registration fee for the participants (Inclusive of GST) :
- Faculty members / Students / Research Scholars : Rs. 900/-
- Industry participants : Rs.1200/-
https://forms.gle/xqcQLSTnJcYLK2DNA
Last date for registration: November 25, 2023
For any queries, contact
The Organizing Secretaries,FreeCAD Workshop, PSG College of Technology,Peelamedu, Coimbatore-641004email : vsk.amcs@psgtech.ac.in / mrp.prod@psgtech.ac.inMobile : 9952418357
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