MIXDES Invited Talk

Let me inform you, that the invited talk "/Ultra-thin Body SOI and Nanowire Transistors for 22nm Technology Node and Below/ " by Thierry Poiroux (Commissariat à l'Énergie Atomique, France) is announced to be held at the MIXDES'2010 Conference (http://mixdes.org/Invited_papers.htm). It could (will) be very interesting.

Open Positions for Doctoral/Master Students on Particle Simulations of Nanostructures

at the Institute for Microelectronics, Vienna University of Technology.

Send your CV to apply@iue.tuwien.ac.at. The call is open until filling the positions.

ERC Advanced Grant an Siegfried Selberherr für Spin-Forschung

Siegfried Selberherr, Professor am Institut für Mikroelektronik der Technischen Universität (TU) Wien, wird als erster Ingenieur Österreichs mit dem „Advanced Grant“ des Europäischen Forschungsrats ERC (European Research Council) ausgezeichnet. Diese prestigeträchtige Auszeichnung ist mit einem Preisgeld von 1,7 Mio. Euro verbunden. Mit den Advanced Investigator Grants hat der ERC eine Förderschiene geschaffen, die sich an bereits etablierte WissenschafterInnen wendet. Mit den Mitteln sollen außergewöhnlich erfolgreiche ForscherInnen dazu ermutigt werden, ambitionierte Projekte mit interdisziplinärem Charakter in Angriff zu nehmen. Es gibt insgesamt sechs österreichische Staatsbürger, die mit einem Advanced Grant ausgezeichnet wurden, wobei nur vier davon in Österreich forschen. Weiters haben drei ausländische Forscher, die in Österreich tätig sind, einen Advanced Grant erhalten. [mehr]

7th International Workshop on Compact Modeling Advance Program

Taipei International Convention Center (TICC)
Taipei, Taiwan
January 18, 2010
Advance Program available on-line

Job offer (PhD grant)

Title: Integrated circuit behaviour optimization based on predictive test
Conditions:
    - Duration three years ( it could be extended to a fourth year)
    - Salary 1300 € per month plus medical insurance
    - Support for attending conferences
    - Free registration in the Electronic Engineering Master courses, shared between the UIB and the UPC (see the web)
Requirements of the candidates:
    - Graduate on Electronic Engineering, Physics or equivalent.
    - Interested in developing a career in research
Contact: Prof. Eugenio Garcia Moreno (eugeni.garcia in the server uib.es)

The call is expected to occur in January 2010, but you can find information about the previous call (2009) about deadlines, conditions, requisites, etc. in this page.

Summary:
Advances in manufacturing technologies of CMOS integrated circuits have enabled obtaining the shrinkage of the device dimensions together with higher working frequencies at the expense of a greater dispersion in their characteristics. The impact of process variations specially affects the performance specifications of the analog and RF sections.
The main objective of this project is to develop design methods that allow to construct inherently robust circuits against manufacturing process variations. We intend to approach the problem from previous results already obtained by our group in predictive test. This test strategy consists in estimating the circuit performance parameters from indirect measurements, an approach easier to implement than by means of the standard methods.
The proposed solution consists, first, in implementing the elements to carry out the test process on the own chip; this is the well-known Built in Self Test technique. Then, the results of the predictive test are used to modify, either the value of a circuit element or the own structure of the circuit, with the aim of optimizing some of their performance specifications. Hence, self-adjustable or reconfigurable circuits are obtained.
Although the concept can be applied to any anlog circuit, its implementation has to be tailored for each kind of circuits. Initially it will be applied to two circuits: a low pass filter for a RF receiver (self-tuning) and a pipeline analog to digital converter (reconfiguration). Nevertheless, all through the project we will seek new objective circuits.