6th EUROSOI-ULIS
Caen, Normandy, France
The EUROSOI-ULIS organizers have announced that the conference
and of the associated satellite events will be postponed to
August 31st - September 4th
The sixth joint EUROSOI-ULIS conference will be hosted by Normandy University (ENSICAEN, UNICAEN, ESIGELEC) in Caen, inside the William the Conqueror Castel, in the auditorium of Museum of Fine Arts. The organizing committee invites scientists and engineers working on SOI technology and advanced nanoscale devices to actively participate by submitting high quality, original contributions (2-page abstracts).
The sixth joint EUROSOI-ULIS conference will be hosted by Normandy University (ENSICAEN, UNICAEN, ESIGELEC) in Caen, inside the William the Conqueror Castel, in the auditorium of Museum of Fine Arts. The organizing committee invites scientists and engineers working on SOI technology and advanced nanoscale devices to actively participate by submitting high quality, original contributions (2-page abstracts).
Important dates :
- abstract submission deadline : January 30, 2020
- notification of acceptance : February 3, 2020
- postponed confernce dates : August 31st - September 4th 2020
• Advanced SOI materials and structures: physical mechanisms and innovative SOI-like devices
• New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator, carbon nanotubes, graphene and other two-dimensional materials
• Properties of ultra-thin films and buried oxides: defects, interface quality, thin gate dielectrics, high-κ materials for switches and memory.
• Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, reliability, high frequency and memory applications
• Alternative transistor architectures: FDSOI, Nanowire, FinFET, MuGFET, vertical MOSFET, FeFET and Tunnel FET, MEMS/NEMS, Beyond-CMOS nanoelectronic devices
• New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain: nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc.
• CMOS scaling perspectives: device/circuit level performance evaluation, switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration
• Transport phenomena: compact modeling, device simulation, front- and back-end process simulation
• Advanced test structures and characterization techniques: parameter extraction, reliability and variability assessment techniques for new materials and novel devices
Need help or information : eurosoiulis2020@sciencesconf.org
Conference Chair: Bogdan Cretu
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