[paper] #32bit microprocessor on #plastic

[paper] Z. Yu, “A #32bit microprocessor on #plastic,” Nature Electronics, Aug. 2021 https://t.co/K9hOZx05k6 #semi https://t.co/tO7TGBh5Gw

— Wladek Grabinski (@wladek60) Aug 9, 2021

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from Twitter https://twitter.com/wladek60

August 09, 2021 at 03:16PM
via IFTTT

Foxconn to Acquire Macronix's #6inch #wideband gap semiconductors #Wafer #Fab [EE Times Asia https://t.co/4fohHYy2za] #semi https://t.co/8St4KWqdnZ

Foxconn to Acquire Macronix's #6inch #wideband gap semiconductors #Wafer #Fab [EE Times Asia https://t.co/4fohHYy2za] #semi https://t.co/8St4KWqdnZ

— Wladek Grabinski (@wladek60) Aug 9, 2021

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from Twitter https://twitter.com/wladek60

August 09, 2021 at 11:41AM
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[paper] Compact Model for Thin-Film Heterojunction Anti-Ambipolar Transistors

Hocheon Yoo and Chang-Hyun Kim, Senior Member, IEEE 

Unified Compact Model for Thin-Film Heterojunction Anti-Ambipolar Transistors

IEEE Electron Device Letters (2021)

DOI 10.1109/LED.2021.3102219

* Department of Electronic Engineering, Gachon University, Seongnam 13120, South Korea

Abstract: This letter proposes an advanced compact model for anti-ambipolar transistors based on a lateral thin-film material heterojunction. The modeling idea focuses on an analytical description of component currents and bridging methods necessary for controllable transition between operation regimes. The model is validated by experimental data, and predictive simulations are carried out to demonstrate its applicabilities.

Fig: (a) Cross-sectional device structure of an AAT and its energy diagram at a negative VD (G: gate, S: source, and D: drain). (b) Conceptual illustration of the geometrical origin of the anti-ambipolar switching behavior.

Acknowledgements: This work was supported by the National Research Foundation of Korea (NRF) grants funded by the Korean government (MSIT) (NRF-2019 R1C1C1003356, NRF2020 R1A2C1101647).

[paper] Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries

Mike Brinson and Felix Salfelder 

Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries 

In 28th MIXDES (2021), pp. 35-40 

DOI: 10.23919/MIXDES52406.2021.9497545 

Abstract—The rapid development of new semiconductor materials and devices has highlighted the need for compact modeling and circuit simulation tools that can be easily adapted to accommodate emerging technologies. In most instances device modeling tools employ non-linear behavioural sources and Verilog-A modules for model prototype construction. This paper is concerned with the properties and application of modular user defined/plugin library toolkit that combines the best features of behavioural source and Verilog-A modeling practice while encouraging user extensions. The toolkit has been implemented as a Qucs/Qucs-S/Xyce modular library that is loadable on demand. To demonstrate its capabilities and flexibility a series of compact device models are introduced and their simulated performance presented and evaluated.

Fig: A Qucs-S/Xyce test bench for simulating and displaying BJT Ic/V ce

output characteristics with 1µA ≤ Ib ≤ 10µA in 1µA steps.

[paper] Model for Ultra-Scaled MoS2 MOSFET

Weiran Cai, Wenrui Lan, Zichao Ma*, Lining Zhang, Mansun Chan*

A Full-region Model for Ultra-Scaled MoS2 MOSFET Covering Direct Source-Drain Tunneling 

9th International Symposium on Next Generation Electronics (ISNE), 2021, pp. 1-3,

DOI: 10.1109/ISNE48910.2021.9493621

College of Electronic and Information Technology, Shenzhen University, Shenzhen, China

* Hong Kong University of Science and Technology, Hong Kong, China

Abstract: A full-region model for ultra-scaled monolayer MoS2 MOSFETs is reported in this work. The electrostatic potential in the scaled transistor structure is analyzed based on a first-principle verified potential model. A continuous full region current model is then developed to capture the short channel effects. Based on the potential model, the barrier height and width for direct source-drain tunneling are obtained. The direct tunneling module reproduces the essential physics observed from numerical device simulations. After integration with the thermionic emission model, the full-region current model is implemented into a SPICE simulator and the model convergence is verified by simulating typical circuits.

A drift-diffusion current model of the full region is straightforwardly derived with Taylor expansions of a Si model or from the Pao-Sah integral. It resembles the EKV current model and allows similar expressions of small signal models:

Fig: The impact of SCEs on devices of different channel length is showed in (a) Ids–Vg and (b) Ids–Vd characteristics predicted by the model covering SCEs. When channel length becomes smaller, SCEs becomes more serious. 

Acknowledgement: This work is supported in part by the Natural Science Foundation of China under Grant 61704144, the Shenzhen Science and Technology Project under JCYJ20180305125340386, the General Research Fund (GRF) from Research Grant Council (RGC) of Hong Kong under Grant 16206219