Junior and Senior Researcher positions on advanced semiconductor devices at URV, in Tarragona, Spain

 

Junior and Senior Researcher positions on advanced semiconductor devices at URV, in Tarragona, Spain

The Nanoelectronic and Photonic Systems (NEPHOS) Group at the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV) in Tarragona, Spain, is looking for candidades for  Junior and Senior Researccher positions funded by  the Spanish Ministry of Science.

There are three categories:

1) Junior category: Candidates who obtained their Ph D between January 1 2017 and December 31 2019

2) General category: Candidates who obtained their Ph D between January 1 2011 and December 31 2019

3) For candidales with disability or functional diversity, they must have obtained their Ph D between January 1 2008 and December 31 219.

The duration of this position is 3+2 years; aftewards the position can become permanent.

Candidates must have performed significant contributions in the field of semiconductor devices during their Ph D or later, and this has to be demosntarted by a good number of publications.

Depending on candidate's background, there are several options for the research project to carry out:

1) Organic TFT technology: fabrication, characterization and modeling.

2) Organic solar cells technology: fabrication, characterization and modeling.

3) Modeling (in particular compact modeling) and electrical characterization of 2D semiconductor FETs.

4) Modeling (in particular compact modeling) and electrical characterization of nanowire FETs.

The NEPHOS Group at URV is currently working on the physics, characterization and modeling (in particular compact modeling) of emerging devices, and also in the fabrication and characterization of nanostructured organic photovoltaic devices. Regarding emerging devices, the present interests of the group at URV are the characterization and modeling of nanowire MOSFETs, GaN HEMTs, Graphene and 2D semiconductor FETs and organic and oxide TFTs. Other interests are the fabrication of polymeric TFTs and the modeling of organic solar cells.

Candidates must send their CVs, by January 17  2022 to Prof. Benjamin Iñiguez (Fellow, IEEE)

benjamin.iniguez@urv.cat

Tarragona is about 100 Km south from Barcelona, on the coast (the so-called "Costa Daurada", Golden Coast). Traveling to Tarragona from Barcelona is easier. There are frequent direct buses between Tarragona and Barcelona Airport, and also frequent trains between Tarragona and Barcelona. Besides, from some European cities it is possible to fly to Reus Airport, which is about 10 Km from Tarragona.

Tarragona is one of the most important hubs of tourism in Europe, not only because of the nice beaches around the city, but also because of its historical landmarks.. Tarragona was a very important city of the Roman Empire. In 2000 UNESCO committee officially declared the Roman archaeological complex of Tarraco (name of Tarragona during the Roman Empire) a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

What will the next 50 years bring? #IAmIntel #chips #semi #manufacturing https://t.co/He4qmrkVYY

What will the next 50 years bring? #IAmIntel #chips #semi #manufacturing https://t.co/He4qmrkVYY

— Wladek Grabinski (@wladek60) Dec 29, 2021

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from Twitter https://twitter.com/wladek60

December 29, 2021 at 11:48PM
via IFTTT

Postdoctoral position on advanced semiconductor devices at URV, in Tarragona, Spain

 

Postdoctoral position on advanced semiconductor devices at URV, in Tarragona, Spain

The Nanoelectronic and Photonic Systems (NEPHOS) Group at the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV) in Tarragona, Spain, is looking for candidades for a Postdoctoral position funded by  the Spanish Ministry of Science.

Candidates which obtained their Ph D between January 1 2020 and December 31 2021 can apply.

The duration of this position is 2 years.

Candidates must have performed significant contributions in the field of semiconductor devices during their Ph D or later, and this has to be demosntarted by a good number of publications.

Depending on candidate's background, there are several options for the research project to carry out:

1) Organic TFT technology: fabrication, characterization and modeling.

2) Organic solar cells technology: fabrication, characterization and modeling.

3) Modeling (in particular compact modeling) and electrical characterization of 2D semiconductor FETs.

4) Modeling (in particular compact modeling) and electrical characterization of nanowire FETs.

The NEPHOS Group at URV is currently working on the physics, characterization and modeling (in particular compact modeling) of emerging devices, and also in the fabrication and characterization of nanostructured organic photovoltaic devices. Regarding emerging devices, the present interests of the group at URV are the characterization and modeling of nanowire MOSFETs, GaN HEMTs, Graphene and 2D semiconductor FETs and organic and oxide TFTs. Other interests are the fabrication of polymeric TFTs and the modeling of organic solar cells.

Candidates must send their CVs, by January 17  2022 to Prof. Benjamin Iñiguez (Fellow, IEEE)

benjamin.iniguez@urv.cat

Tarragona is about 100 Km south from Barcelona, on the coast (the so-called "Costa Daurada", Golden Coast). Traveling to Tarragona from Barcelona is easier. There are frequent direct buses between Tarragona and Barcelona Airport, and also frequent trains between Tarragona and Barcelona. Besides, from some European cities it is possible to fly to Reus Airport, which is about 10 Km from Tarragona.

Tarragona is one of the most important hubs of tourism in Europe, not only because of the nice beaches around the city, but also because of its historical landmarks.. Tarragona was a very important city of the Roman Empire. In 2000 UNESCO committee officially declared the Roman archaeological complex of Tarraco (name of Tarragona during the Roman Empire) a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

[paper] Model for TFT Used in a CMOS Inverter Amplifier

Adelmo Ortiz-Conde^a, CarlosÁvila-Avendaño^b, Jesús A.Caraveo-Frescas^b, Manuel A.Quevedo-López^b and Francisco J.García-Sánchez^a

A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier

Solid-State Electronics

Volume 188, February 2022, 108218

DOI: 10.1016/j.sse.2021.108218

   
a Solid State Electronics Laboratory, Universidad Simón Bolívar, Caracas 1080, Venezuela
b Materials Science and Engineering Department, University of Texas at Dallas, Richardson, TX 75080, USA

Abstract: This article presents a generalization of a transregional polylogarithmic model, previously proposed for continuously describing the transfer characteristics of polycrystalline and amorphous Thin Film Transistors (TFTs) at all levels of inversion. The present generalization entails including the necessary drain voltage dependencies to be able to describe also the output characteristics. The model is tested by using it in the design and analysis of a CMOS inverter amplifier consisting of poly-Si n- and p-channel TFTs fabricated at low temperature and pressure. The transistors are biased below threshold so that the CMOS amplifier circuit operates in weak conduction, having in mind energy saving considerations. The validity of the proposed model has been ascertained by comparing model simulations to actual measured data from individual poly-Si TFTs and from the CMOS amplifier circuit. The simulations of the CMOS inverter amplifier are compared to the results obtained using look-up table-type simulations.

Fig: Normalized current with respect to its maximum value versus gate bias for two different values of drain bias (top). The curve for the higher drain bias (blue dash line) is shifted to the right of that for the lower drain bias (red continuous line), indicating that VT increases as VDS increases. The corresponding Y function versus gate bias (bottom) illustrates a similar increase of VT with VDS. 

Acknowledgment: The authors would like to thank the reviewers and the editor for their valuable work, which has led to a significant improvement in the quality of this article.

[mos-ak] [online publications] 14th International MOS-AK Workshop on Dec.17, 2021

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

14th International MOS-AK Workshop

Silicon Valley, Dec. 17, 2021

The MOS-AK Association with local technical program promoters: INAOE, ASCENT+, and the Extended MOS-AK TPC Committee have organized its subsequent 14th International MOS-AK Workshop as a virtual/online event on Dec.17, 2021

Online Publications:

There are MOS-AK technical presentations covering selected aspects of the compact/SPICE modeling and its Verilog-A standardization; see submitted slide presentations online at corresponding link:

https://www.mos-ak.org/silicon_valley_2021/

The workshop was opened with a short introduction to 2021 accomplishments of the Si2 CMC [i_2]

Followed by Morning MOS-AK Session (10:00am - 1:00pm GMT-8) chaired by Franz Sischka; Sisconsult (DE)

First talk [T-1] is about numerical TCAD modeling of MRAM; 

followed by two talks on device level modeling [T_2, T_3]. 

Then [T_4, T_5 and N_1] are EDA tools related.

After a "virtual break" Afternoon MOS-AK Session (1:00pm - 3:30pm GMT-8) was chaired by Gilson I Wirth, UFRGS (BR)

[T_6] is a follow-up of earlier three EDA tools related prestations; 

[T_7] is device level/graphene transistors modeling talk. 

Then [T_8  and T_9] are about open source simulators with focus on the Verilog-A model standardization/implementation. 

The workshop will be concluded with [T-10] on passive components/TSV modeling.

The MOS-AK Association plans to continue its standardization efforts by organizing future compact modeling meetings, workshops and courses around the globe thru the Next 2022 Year, including:

• 2nd MOS-AK Asia/South Pacific, (online) Jan/Feb, 2022
  
• 3rd MOS-AK/India Conference, Hyderabad (IN) Postponed 2022
• 4th MOS-AK/LAEDC Workshop, Mexico 2022
• 20th MOS-AK/ESSDERC/ESSCIRC, Milano Sept.19-22, 2022

W.Grabinski on the behalf of International MOS-AK Committee

WG23122021

 

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