Showing posts with label tunneling current. Show all posts
Showing posts with label tunneling current. Show all posts

May 23, 2023

[paper] Schottky Barrier FET at Deep Cryogenic Temperatures

Christian Roemer1,2, Nadine Dersch1, Ghader Darbandy1, Mike Schwarz1,
Yi Han3, Qing-Tai Zhao3, Benjamın Iniguez2 and Alexander Kloes1
Compact Modeling of Schottky Barrier Field-Effect Transistors 
at Deep Cryogenic Temperatures
EUROSOI-ULIS 2023
in Tarragona (Catalonia, Spain) on May 10-12 2023

1 NanoP, TH Mittelhessen - University of Applied Sciences, Giessen, Germany
2 DEEEA, Universitat Rovira i Virgili, Tarragona, Spain
3 Peter-Grunberg-Institute (PGI 9), Forschungszentrum Julich, Germany


Abstract: In this paper, a physics-based DC compact model for Schottky barrier field-effect transistors at deep cryogenic temperatures is presented. The model uses simplified tunneling equations at temperatures of ϑ ≈ 0 K in order to calculate the field emission injection current at the device’s Schottky barriers. The compact model is also compared to and verified by measurements of ultra-thin body and buried oxide SOI Schottky barrier field-effect transistors and is able to capture the signature of resonant tunneling effects in the transfer characteristics.

FIG: Band diagram at the source side Schottky junction (left-hand side). The solid blue line is the conduction band of the channel and the blue dashed line shows the metal’s Fermi energy level. The right-hand side subplot shows the tunneling probability, with the exponential part (red line) and the total probability, including the oscillations (green line).



Oct 6, 2021

[paper] Gate Tunneling Current in MFIS NCFETs

Kshitiz Tyagi, Amit Verma, and Aloke K. Dutta
Modeling of the Gate Tunneling Current in MFIS NCFETs
IEEE Transactions on Electron Devices, pp. 1–8, Sept.18, 2021.
DOI: 10.1109/TED.2021.3114386
  
Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur 208016, India
  
Abstract: In this article, we present a model for the gate tunneling current (GTC) in metal-ferroelectric-insulator-semiconductor (MFIS) negative capacitance FETs (NCFETs), which, to the best of our knowledge, is the first such report. The model is numerical in nature, and is developed using the Tsu–Esaki formulation, employing the Wentzel–Kramer–Brillouin (WKB) approximation, in order to estimate the transmission coefficients of the carriers through the barriers. The ferroelectric (FE) material considered is HfO2, and is modeled using the Landau phase transition theory. Simulation results reveal a remarkable nonmonotonic dependence of the GTC on the FE layer thickness, an effect that we explain through the Landau model. Furthermore, it is shown how this GTC can be reduced by orders of magnitude without changing the overall dielectric capacitance-a feature that may prove to be beneficial in low-power circuit designs. Additionally, it is seen that the GTC is a weak function of the remanent polarization and coercive field of the FE. All the model predictions are validated through a comparison with the results obtained from 2-D TCAD simulations. The novel results presented in this work should serve as a guide for detailed experimental studies on the gate current characteristics of MFIS NCFETs.
Fig: Direct (DT) and Fowler–Nordheim (FN) tunneling modes of electrons having various energies, from the Si conduction band to the gate region

Acknowledgment: The authors would like to acknowledge the help of Mr. Amol Gaidhane at Nanolab, IIT Kanpur, in setting up the TCAD simulation workbench