[paper] TFT for Mixed Signal and Analog Computation

Eva Bestelink, Olivier de Sagazan, Lea Motte, Max Bateson, Benedikt Schultes, S. Ravi P. Silva,

and Radu A. Sporea

Versatile Thin‐Film Transistor with Independent Control of Charge Injection and Transport

for Mixed Signal and Analog Computation

Adv. Intell. Syst.. (2020) pp.1-9, DOI:10.1002/aisy.202000199 

Abstract: New materials and optimized fabrication techniques have led to steady evolution in large area electronics, yet significant advances come only with new approaches to fundamental device design. The multimodal thin-film transistor introduced here offers broad functionality resulting from separate control of charge injection and transport, essentially using distinct regions of the active material layer for two complementary device functions, and is material agnostic. The initial implementation uses mature processes to focus on the device’s fundamental benefits. A tenfold increase in switching speed, linear input–output dependence, and tolerance to process variations enable low-distortion amplifiers and signal converters with reduced complexity. Floating gate designs eliminate deleterious drain voltage coupling for superior analog memory or computing. This versatile device introduces major new opportunities for thin-film technologies, including compact circuits for integrated processing at the edge and energy-efficient analog computation.

Figure: Outcomes of separating control for injection and conduction shown via TCAD simulation. a) MMT transient response is much faster than conventional contact-controlled TFTs

b) A MMT with multiple, appropriately sized CG1 gates can function as a digital-to-analog converter (DAC) with CG2 providing an enabling, sampleand-hold (S/H) function. 

Acknowledgements: E.B. and R.A.S. contributed equally to this work. This work was partly supported through EPSRC grants EP/R511791/1 and EP/R028559/1 and Research Fellowship 10216/110 from the Royal Academy of Engineering of Great Britain. Device fabrication had been performed on the NanoRennes platform. The authors thank Dr. Brice Le Borgne for initial liaison and process discussions, Prof. John M. Shannon for on-going advisory meetings, Prof. Craig Underwood for reviewing the manuscript, Dr. David Cox and Mr. Mateus Gallucci Masteghin for assistance with the SEM images.

[paper] Compact Source-Gated Sensor

Eva Bestelink, Student Member, IEEE, Kham M. Niang, Georgios Bairaktaris, Luca Maiolo, Francesco Maita, Kalil Ali, Andrew J. Flewitt, S. Ravi P. Silva

and Radu A. Sporea, Senior Member, IEEE

Compact Source-Gated Transistor Analog Circuits for Ubiquitous Sensors

In IEEE Sensors. Jul 18, 2020

Abstract: Silicon-based digital electronics have evolved over decades through an aggressive scaling process following Moore’s law with increasingly complex device structures. Simultaneously, large-area electronics have continued to rely on the same field-effect transistor structure with minimal evolution. This limitation has resulted in less than ideal circuit designs, with increased complexity to account for shortcomings in material properties and process control. At present, this situation is holding back the development of novel systems required for printed and flexible electronic applications beyond the Internet of Things. In this work we demonstrate the opportunity offered by the source-gated transistor’s unique properties for low-cost, highly functional large-area applications in two extremely compact circuit blocks. Polysilicon common-source amplifiers show 49 dB gain, the highest reported for a twotransistor unipolar circuit. Current mirrors fabricated in polysilicon and InGaZnO have, in addition to excellent current copying performance, the ability to control the temperature dependence (degrees of positive, neutral or negative) of output current solely by choice of relative transistor geometry, giving further flexibility to the design engineer. Application examples are proposed, including local amplification of sensor output for improved signal integrity, as well as temperature-regulated delay stages and timing circuits for homeostatic operation in future wearables. Numerous applications will benefit from these highly competitive compact circuit designs with robust performance, improved energy efficiency and tolerance to geometrical variations: sensor front-ends, temperature sensors, pixel drivers, bias analog blocks and high-gain amplifiers.

FIG: a) Photomicrograph of a typical polysilicon SGT fabricated; b) Driver M1 output characteristics (black curves, VGmax = -15 V, step 0.5 V) and superimposed M2 load line (orange, VG = 0 V). VSAT1 occurs as a result from pinch-off at the source and VSAT2 represents channel pinch-off of the parasitic FET. 

Acknowledgment: R.A.S. acknowledges the Royal Academy of Engineering of Great Britain for the support through the Research Fellowship (Grant No. 10216/110), the Royal Society of Great Britain through project ARES IES\R3\170059 and EPSRC for grants EP/R028559/1 and EP/R025304/1. K.M.N. and A.J.F. acknowledge the support of the Engineering and Physical Sciences Research Council (EPSRC) through project EP/M013650/1. R.A.S. thanks Prof John Shannon for technical discussions, Dr Nigel Young and Dr Michael Trainor for assistance with polysilicon device design and fabrication.