[paper] New Design Concept for the IoT Era

Pedro Toledo, Graduate Student Member, IEEE, Roberto Rubino, Graduate Student Member, IEEE, Francesco Musolino, Member, IEEE, and Paolo Crovetti, Senior Member, IEEE

Re-Thinking Analog Integrated Circuits in Digital Terms: A New Design Concept for the IoT Era

IEEE Transactions on Circuits and Systems—II: Express Briefs, 

Vol. 68, No. 3, March 2021

DOI:  10.1109/TCSII.2021.3049680

* DET, Politecnico di Torino (IT)

Abstract: A steady trend towards the design of mostly-digital and digital-friendly analog circuits, suitable to integration in mainstream nanoscale CMOS by a highly automated design flow, has been observed in the last years to address the requirements of the emerging Internet of Things (IoT) applications. In this context, this tutorial brief presents an overview of concepts and design methodologies that emerged in the last decade, aimed to the implementation of analog circuits like Operational Transconductance Amplifiers, Voltage References and Data Converters by digital circuits. The current design challenges and application scenarios as well as the future perspectives and opportunities in the field of digital-based analog processing are finally discussed.

Fig: a) Kuijk’s Bandgap voltage reference [i]. b) Microcontroller-based proof

of concept prototype.

REF:

[i] K. E. Kuijk, “A precision reference voltage source,” IEEE J. Solid-StateCircuits, vol. SSC-8, no. 3, pp. 222–226, Jun. 1973.

Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

 WEDNESDAY June 04, 4:00pm - 6:00pm | Room 302 

 TRACK: EDA

 TOPIC AREA: EMERGING TECHNOLOGIES

 SPECIAL DAC SESSION 63: Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

Chair:  Michael Niemier; Univ. of Notre Dame, IN
Organizers:  Michael Niemier; Univ. of Notre Dame, IN
Xiaobo Sharon Hu; Univ. of Notre Dame, IN

Want to learn about the latest developments in FinFET-based processor design? What other transistor technologies might follow FinFETs and would they bring new design and modeling challenges? Come to this session to hear about both near- and long-term transistor technologies and their prospects for continuing Moore’s Law-based performance scaling trends. The session will begin with a discussion of FinFET technology; subsequent presentations will discuss tunnel transistors (TFETs) as well as other emerging FET technologies that could reenable voltage scaling. The session will conclude with a discussion of modeling efforts that consider the impact of new device technologies on von Neumann architectures as well as hybrid analog/digital circuits and architectures.

63.1 FinFET's and Their Implications for Design Now and in the Future

• Speaker: Rob Aitken; ARM Ltd., San Jose, CA
  Greg Yeric; ARM Ltd., Austin, TX
  Brian Cline; ARM Ltd., Austin, TX
  Lucian Shifren; ARM Ltd., San Jose, CA

63.2 Emerging Devices for Logic: Can a Low-Power Switch Be Fast?

• Speaker: Thomas Theis; IBM T.J. Watson Research Center, Yorktown Heights, NY

63.3 Energy Efficient Tunnel-FET Transistors for Beyond CMOS Logic

• Speaker: Uygar Avci; Intel Corp., Portland, OR
  Daniel Morris; Intel Corp., Portland, OR
  Ian Young; Intel Corp., Hillsboro, OR

63.4 Steep Slope Devices: Enabling New Architectural Paradigms

• Speaker: Vijaykrishnan Narayanan; Pennsylvania State Univ., State College, PA
  Karthik Swaminathan; Pennsylvania State Univ., State College, PA
  Huichu Liu; Pennsylvania State Univ., State College, PA
  Moon Seok Kim; Pennsylvania State Univ., State College, PA
  Xueqing Li; Pennsylvania State Univ., State College, PA
  Jack Sampson; Pennsylvania State Univ., University Park, PA

[more about the DAC Conference]