FOSS EKV2.6 Verilog-A Compact MOSFET Model
Wladek Grabinski1, Marcelo Pavanello2, Michelly de Souza2, Daniel Tomaszewski3, Jola Malesinska3, Grzegorz Głuszko3, Matthias Bucher4, Nikolaos Makris4, Aristeidis Nikolaou4, Ahmed Abo-Elhadid5, Marek Mierzwinski6, Laurent Lemaitre7, Mike Brinson8, Christophe Lallement9, Jean-Michel Sallese10, Sadayuki Yoshitomi11, Paul Malisse12, Henri Oguey13, Stefan Cserveny13, Christian Enz10, François Krummenacher10 and Eric Vittoz10
in 49th European Solid-State Device Research Conference
(ESSDERC; pp. 190-193)
DOI: 10.1109/essderc.2019.8901822
FOSS EKV2.6 Verilog-A at GitHub https://github.com/ekv26/model
2 Centro Universitario FEI, Sao Bernardo do Campo (BR),
3 Institute of Electron Technology, Warsaw (PL),
4 Technical University of Crete, Chania (GR),
5 Mentor Graphics (USA),
6 Keysight Technologies (USA),
7 Lemaitre EDA Consulting,
8 London Metropolitan University (UK),
9 ICube, Strasbourg University (F),
10 EPFL Lausanne,
11 Toshiba (J),
12 Europractice/IMEC (B),
13 CSEM S.A., Neuchatel (CH)
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