8th International MOS-AK Workshop
Washington DC December 9, 2015
2nd Announcement and Call for Papers
Washington DC December 9, 2015
2nd Announcement and Call for Papers
Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held in Washington DC in the IEDM / CMC meetings timeframe Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors.
Venue:
Embassy of Switzerland
2900 Cathedral Ave, NW,
Washington, DC 20008
USA
2900 Cathedral Ave, NW,
Washington, DC 20008
USA
Important Dates:
- Call for Papers - Sept. 2015
- 2nd Announcement - Oct. 2015
- Final Workshop Program - Nov. 2015
- MOS-AK Workshop - Dec, 9, 2015
- http://www.mos-ak.org/washington_dc_2015/
- 08:30 - 09:00 - On-site Registration
- 09:00 - 10:30 - Morning MOS-AK Session
- 11:00 - 12:00 - CM Standardization Pannel
- 12:00 - 13:00 - Lunch
- 13:00 - 16:00 - Afternoon MOS-AK Session
- Advances in semiconductor technologies and processing
- Compact Modeling (CM) of the electron devices
- Verilog-A language for CM standardization
- New CM techniques and extraction software
- Open Source TCAD/EDA modeling and simulation
- CM of passive, active, sensors and actuators
- Emerging Devices, CMOS and SOI-based memory cells
- Microwave, RF device modeling, high voltage device modeling
- Nanoscale CMOS devices and circuits
- Technology R&D, DFY, DFT and IC Designs
- Foundry/Fabless Interface Strategies
Tentative MOS-AK speakers list
- Mathieu Luisier (ETHZ) TCAD for nanoscaled devices
- Mansun Chan (HKUST) iMOS online simulation platform
- Akira Ito (Broadcom) Leading-edge RF MOSVAR Modeling
- Samuel Mertens (Cadence)
- Rob Jones (Raytheon), GaN FET model standardization
- Klaus-Willi Pieper (Infineon)
- Ehrenfried Seebacher (ams) DIODE_CMC standard diode model
- Colin Shaw (Silvaco) CMC OMI - based on TSMC TM
- Joddy Wang (Synopsys) FinFET SPICE modeling
- Mike Brinson (Qucs) EDD Verilog-A Prototyping Platform
- Mark Lundstrom (Purdue)
- Jaijeet Roychowdhury (UCB) Model and Algorithm Prototyping Platform (MAPP)
Authors should submit an abstract using on-line MOS-AK submission form:
http://www.mos-ak.org/washington_dc_2015/abstracts.php
(any related inquiries can be sent to abstracts@mos-ak.org)
Free Online Workshop Registration:
Free Online Workshop Registration:
http://www.mos-ak.org/washington_dc_2015/registration.php
(any related inquiries can be sent to registration@mos-ak.org)
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems
Extended MOS-AK Committee
(any related inquiries can be sent to registration@mos-ak.org)
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems
Extended MOS-AK Committee
WG102015
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