Mar 15, 2024

[paper] Next Wave for AI/ML in Physical Design

Andrew B. Kahng
Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design
ISPD ’24 Proceedings
March 12–15, 2024, Taipei, Taiwan.
DOI 10.1145/3626184.3635277

Abstract: It has been six years since an ISPD-2018 invited talk on “Machine Learning Applications in Physical Design”. Since then, despite considerable activity across both academia and industry, many R&D targets remain open. At the same time, there is now clearer understanding of where AI/ML can and cannot (yet) move the needle in physical design, as well as some of the difficult blockers and technical challenges that lie ahead. Some futures for AI/ML-boosted physical design are visible across solvers, engines, tools and flows and in contexts that span generative AI, the modeling of “magic” handoffs at flow interstices, academic research infrastructure, and the culture of benchmarking and open-source EDA.

Fig: OpenROAD as a new EDA playground for ML researchers

Acknowledgments: Many thanks to Sayak Kundu, Bodhisatta Pramanik, Zhiang Wang and Dooseok Yoon for their help with the figures and text in this paper. Discussions with Siddhartha Nath, Igor Markov, Chuck Alpert and Ilgweon Kang are also gratefully acknowledged. Research at UCSD is partially supported by DARPA, Samsung, the C-DEN center, and gifts from Google, Intel and others.


Mar 11, 2024

Importance of Open-Source EDA Tools for Academia

Importance of Open-Source EDA Tools for Academia
Open Letter on European Strategic and Funding Directions
https://open-source-eda-letter.eu/


Initial Signatories of the Open-Source-EDA-Letter, as of March 8, 2024, are:

Luca Benini
University of Bologna, Italy & ETH Zürich, Switzerland
Professor, Lead of the RISC-V PULP platform

Giovanni De Micheli
EPFL Lausanne, Switzerland
Professor and Director, LSI lab

Marie-Minerve Louërat
Sorbonne University, France
Research Scientist, Coriolis Foundation hosted by CNRS Foundation

Harald Pretl
Johannes Kepler University Linz, Austria
Professor, Maintainer of IIC-OSIC-TOOLS

Stefan Wallentowitz
Hochschule München University of Applied Sciences, Germany
Professor, Director at FOSSi Foundation & Director at RISC-V

All the educators and researchers from European academic institutions are kindly asked to consider and eventually co-sign this open letter. To co-sign, please send a mail from your university mailing address to stefan.wallentowitz@hm.edu and include your affiliation and ideally include a link to your profile.

AACD 2024 Final Program

We are proud to announce the final program
of the 32nd Advances in Analog Circuit Design Workshop (AACD24),
which will be held at University of Pavia, Italy on April, 9th-11th, 2024

Flyer

Registration to AACD24 is open at:
https://www.mbtechnoservices.com/aacd24/index.php?page=Registration.html

For any further information:

We look forward to meeting you in Pavia for this very exciting edition of the AACD Workshop!!!!

Andrea Baschirotto
Piero Malcovati AACD24 Organizing Committee

Please do not reply to this e-mail. If you want to be removed from the MBTechnoServices mailing list, please visit: http://www.mbtechnoservices.com/index.php?page=MailingList/Unsubscribe.html&EMail=wladek@mos-ak.org

Mar 5, 2024

[Open PDK] IEEE EDS DL at IISc Banglare

IEEE EDS/SSCS Bangalore Chapter Presents DL Series

FOSS TCAD/EDA Tools SPICE and Verilog-A
Modeling Flow Technology - Devices - Applications
W.Grabinski, MOS-AK (EU)


DATE AND TIME LOCATION HOSTS
Date: 07 Mar 2024
Time: 04:00 PM to 05:00 PM
All times are (UTC+05:30) Chennai
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Auditorium, Dept. of ESE,
IISc Bangalore
Karnataka India 560012
Bangalore Section
Jt. Chapter ED15/SSC37

Mar 4, 2024

[EDTM] Open PDK Initiative

8th IEEE EDTM
March 3-6, 2024
Strengthening Globalization in Semiconductors

The EDTM Conference to host two contributions discussing the status of Open PDK Initiative:

[6C-1] [Invited] Disrupting Conventional Chip Design through the Open Source EDA Ecosystem
Mehdi Saligane; University of Michigan, USA

[P2-36] FOSS CAD for the Compact Verilog-A Model Standardization in Open PDKs
Wladek Grabinski, et al. MOS-AK (EU); IHP - Leibniz-Insitut für innovative Mikroelektronik;


as of March 12, 2024: