Jul 25, 2016

FOSDEM 2017 - Next FOSDEM: 4 & 5 February 2017 https://t.co/xH7IAxXLyr #papers https://t.co/TlZzFKZVB9


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July 25, 2016 at 04:59PM
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FOSDEM 2017 - Next FOSDEM: 4 & 5 February 2017 https://t.co/xH7IAxXLyr #papers


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July 25, 2016 at 04:59PM
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Implementation and quality testing for HICUM/L2 compact models implemented in Verilog-A https://t.co/xXnNhTZcgb #papers


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July 25, 2016 at 02:11PM
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Jul 22, 2016

VeSFET is a twin-gate device with 3D vertical terminals and channel based on SOI conventional CMOS https://t.co/AGiySLvzUj #papers


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July 22, 2016 at 03:18PM
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Jul 20, 2016

Leti-UTSOI Compact Model

The Leti-UTSOI compact model is the only one to be totally dedicated to the FDSOI technology. In its recent version, the Leti-UTSOI model has reached its maturity. In collaboration with STM, its robustness was validated by successfully complying with the full test suite recommended by the CMC. The Leti-UTSOI model is now currently used at STM in the IC design division. It is now available in an industrial design-kit. The documentation and some model cards (typical) are available below:
The Leti-UTSOI Verilog-A code can also be obtained contacting LETI UTSOI Developers.


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Location: Grenoble, France
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