Mar 15, 2010
Angelov FET Model Documents at Uni.Chalmers
New web page with collection of some documents, files and papers on Angelov's FET Large Signal Nonlinear Transistor Mode [link]
Mar 5, 2010
Top 10 cited papers in Solid-State Electronics
I wish to congratulate some friends, because their papers are ranked 4th and 5th in the top 10 cited papers published in Solid-State Electronics... and these are also the first papers in the list about compact modelling...
Many congratulations Adelmo, Francisco, Jean-Michel and Christian !
By the way, the papers are:
Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
Volume 49, Issue 4, 2005, Pp 640-647
Ortiz-Conde, A. | Sánchez, F.J.G. | Muci, J.
A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism
Volume 49, Issue 3, 2005, Pp 485-489
Sallese, J.-M. | Krummenacher, F. | Prégaldiny, F. | Lallement, C. | Roy, A. | Enz, C.
Many congratulations Adelmo, Francisco, Jean-Michel and Christian !
By the way, the papers are:
Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
Volume 49, Issue 4, 2005, Pp 640-647
Ortiz-Conde, A. | Sánchez, F.J.G. | Muci, J.
A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism
Volume 49, Issue 3, 2005, Pp 485-489
Sallese, J.-M. | Krummenacher, F. | Prégaldiny, F. | Lallement, C. | Roy, A. | Enz, C.
Mar 2, 2010
Compact TFT Modelling Workshop (C-TFT)
The Third International Workshop on Compact Thin-Film Transistor Modelling (C-TFT) will be held in Tarragona, Spain, on July 2 2010.
This workshop will provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by the Universitat Rovira i Virgili in collaboration with the IEEE EDS Compact Modeling Technical Committee and the University College London .
Topics:
A partial list of the areas of interest includes:
- Physics of TFTs and operating principles
- Compact TFT device models for circuit simulation
- Model implementation and circuit analysis techniques
- Model parameter extraction techniques
- Applications of compact TFT models in emerging products
- Compact models for interconnects in active matrix flat panels
Other details:
Prospective authors are invited to submit an abstract of up to 500-word to: nae.bogden@urv.cat
Important dates:
- Deadline for abstract submission: May 7, 2010
- Notification of acceptance: May 21, 2010
- Camera-ready version: Jun 18, 2010
Technical comitee members:
General chair person: Prof. Benjamin Iniguez, University Rovira i Virgili, Spain
Rodrigo Picos, Universitat de les Illes Balears, Spain
Bill Milne, Cambridge University, UK
Maria Merlyne De Souza, Sheffield University, UK
Arokia Nathan, University College London, UK
Norbert Fruehauf, University of Stuttgart, Germany
Samar Saha, Silterra Corp., USA
Jamal Deen, McMaster University, Canada
Magali Estrada, CINVESTAV, Mexico
James B. Kuo, National Taiwan University, Taiwan
Hyun Jae Kim, Yonsei University, Korea
Zhou Xing, Nanyang Technological University, Singapore
Local Committee Members:
Benjamin Iniguez, Universitat Rovira i Virgili, Spain
Lluis F. Marsal, Universitat Rovira i Virgili, Spain
Josep Pallares, Universitat Rovira i Virgili, Spain
Josep Ferre, Universitat Rovira i Virgili, Spain
Roger Cabre, Universitat Rovira i Virgili, Spain
Pilar Formentin, Universitat Rovira i Virgili, Spain
Francois Lime, Universitat Rovira i Virgili, Spain
Bogdan Nae, Universitat Rovira i Virgili, Spain
Directions and maps:
University of Rovira i Virgili Campus Map
Tarragona is well connected with the spanish airports of Madrid, Barcelona or Reus by means of trains or buses.
For train tickets, please visit the national railroad company, RENFE. For bus information, please visit La Hispano Igualadina company.
About Tarragona:
Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tarraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.
This workshop will provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by the Universitat Rovira i Virgili in collaboration with the IEEE EDS Compact Modeling Technical Committee and the University College London .
Topics:
A partial list of the areas of interest includes:
- Physics of TFTs and operating principles
- Compact TFT device models for circuit simulation
- Model implementation and circuit analysis techniques
- Model parameter extraction techniques
- Applications of compact TFT models in emerging products
- Compact models for interconnects in active matrix flat panels
Other details:
Prospective authors are invited to submit an abstract of up to 500-word to: nae.bogden@urv.cat
Important dates:
- Deadline for abstract submission: May 7, 2010
- Notification of acceptance: May 21, 2010
- Camera-ready version: Jun 18, 2010
Technical comitee members:
General chair person: Prof. Benjamin Iniguez, University Rovira i Virgili, Spain
Rodrigo Picos, Universitat de les Illes Balears, Spain
Bill Milne, Cambridge University, UK
Maria Merlyne De Souza, Sheffield University, UK
Arokia Nathan, University College London, UK
Norbert Fruehauf, University of Stuttgart, Germany
Samar Saha, Silterra Corp., USA
Jamal Deen, McMaster University, Canada
Magali Estrada, CINVESTAV, Mexico
James B. Kuo, National Taiwan University, Taiwan
Hyun Jae Kim, Yonsei University, Korea
Zhou Xing, Nanyang Technological University, Singapore
Local Committee Members:
Benjamin Iniguez, Universitat Rovira i Virgili, Spain
Lluis F. Marsal, Universitat Rovira i Virgili, Spain
Josep Pallares, Universitat Rovira i Virgili, Spain
Josep Ferre, Universitat Rovira i Virgili, Spain
Roger Cabre, Universitat Rovira i Virgili, Spain
Pilar Formentin, Universitat Rovira i Virgili, Spain
Francois Lime, Universitat Rovira i Virgili, Spain
Bogdan Nae, Universitat Rovira i Virgili, Spain
Directions and maps:
University of Rovira i Virgili Campus Map
Tarragona is well connected with the spanish airports of Madrid, Barcelona or Reus by means of trains or buses.
For train tickets, please visit the national railroad company, RENFE. For bus information, please visit La Hispano Igualadina company.
About Tarragona:
Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tarraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.
Feb 26, 2010
Lots of Foundries and Fabless Companies do exist - what about standards for their interface?
DATE 2010 ET-P3 PANEL SESSION
Date: Thu, 2010-03-11; Time: 12:45-13:45
Room: Exhibition Theatre, Ground Floor
Organizers: Manfred Dietrich, Fraunhofer IIS/EAS, and Rene Schueffny, TU Dresden
Date: Thu, 2010-03-11; Time: 12:45-13:45
Room: Exhibition Theatre, Ground Floor
Organizers: Manfred Dietrich, Fraunhofer IIS/EAS, and Rene Schueffny, TU Dresden
Companies like Broadcom and Nvidia have shown that the Fabless model conquers the semiconductor market. Today all IDM’s use foundries as second source or use it as part of their volume production Because of the high cost of new manufacturing facilities IDM’s become Fablight and concentrate with their production on highly sophisticated processes. How is it possible to handle even more complex circuits if their processes cannot any more be deeply influenced by the internal design team? Today the value chain of the semiconductor market isolates and dominates more and more the vertical companies like EDA, Design house, Fabless, IP provider, Foundry Test & Packaging. Do we have already enough standards or do we need more and where do we need more standards and how can we make it happen? Who will be the driver or who should be the driver? This panel should offer some answers or even create more questions! It is fact - Fabless companies will have more and more impact in the whole IC logic market and Foundries increase their market share every year! Is it time for standards? [more]
Download DATE 2010 Conference Programme (PDF - 3 MB)
Download DATE 2010 Conference Programme (PDF - 3 MB)
Feb 24, 2010
Ultra Low Power Bioelectronics
Fundamentals, Biomedical Applications, and Bio-inspired Systems
Rahul Sarpeshkar; Massachusetts Institute of Technology
Hardback (ISBN-13: 9780521857277)
[Table of contents]
Rahul Sarpeshkar; Massachusetts Institute of Technology
Hardback (ISBN-13: 9780521857277)
This book provides, for the first time, a broad and deep treatment of the fields of both ultra low power electronics and bioelectronics. It discusses fundamental principles and circuits for ultra low power electronic design and their applications in biomedical systems. It also discusses how ultra energy efficient cellular and neural systems in biology can inspire revolutionary low power architectures in mixed-signal and RF electronics. The book presents a unique, unifying view of ultra low power analog and digital electronics and emphasizes the use of the ultra energy efficient subthreshold regime of transistor operation in both. Chapters on batteries, energy harvesting, and the future of energy provide an understanding of fundamental relationships between energy use and energy generation at small scales and at large scales. A wealth of insights and examples from brain implants, cochlear implants, bio-molecular sensing, cardiac devices, and bio-inspired systems make the book useful and engaging for students and practicing engineers.
[Table of contents]
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