Showing posts with label trap density. Show all posts
Showing posts with label trap density. Show all posts

Jan 5, 2021

[paper] Aged MOSFET and Its Compact Modeling

F. A. Herrera, M. Miura-Mattausch, T. Iizuka, H. Kikuchihara, H. J. Mattausch and H. Takatsuka, Universal Feature of Trap-Density Increase in Aged MOSFET and Its Compact Modeling
SISPAD, Kobe, Japan, 2020, pp. 109-112
DOI: 10.23919/SISPAD49475.2020.9241674

Abstract: Our investigation focuses on accurate circuit aging prediction for bulk MOSFETs. A self-consistent aging modeling is proposed, which considers the trap-density Ntrap increase as the aging origin. This Ntrap is considered in the Poisson equation together with other charges induced within MOSFET. It is demonstrated that a universal relationship of the Ntrap increase as a function of integrated substrate current, caused by device stress, can describe the MOSFET aging in a simple way for any device-operating conditions. An exponential increase with constant and unitary slope of the Ntrap is found to successfully predict the aging phenomena, reaching a saturation for high stress degradation. The model universality is verified additionally for any device size. Comparison with existing conventional aging modeling for circuit simulation is discussed for demonstrating the simplifications due to the developed modeling approach

Fig: Schematic of the density-of-state (DOS) model as a function of the state-energy difference from the conduction-band edge, with two parameters gc and Es introduced as new model features.


Oct 6, 2020

[paper] oTFT Charge-Based Variability Model

Aristeidis Nikolaou, Ghader Darbandy, Jakob Leise, Jakob Pruefer, James W. Borchert, Michael Geiger, Hagen Klauk, Benjamin Iñiguez, Fellow, IEEE,
and Alexander Kloes, Senior Member, IEEE
Charge-Based Model for the Drain-Current Variability in Organic Thin-Film Transistors 
Due to Carrier-Number and CorrelatedMobility Fluctuation
in IEEE TED (early access), DOI: 10.1109/TED.2020.3018694.

Abstract: In this study, a consistent analytical chargebased model for the bias-dependent variability of the drain current of organic thin-film transistors is presented. The proposed model combines both charge-carrier-numberfluctuation effects and correlated-mobility-fluctuation effects to predict the drain-current variation and is verified using experimental data acquired from a statistical population of organic transistors with various channel dimensions, fabricated on flexible polymeric substrates in the coplanar or the staggered device architecture.

Fig: a) Cross section of the organic TFTs fabricated in the inverted coplanar (bottom-gate, bottom-contact) architecture. b) Transistor channel divided into a noisy element between positions x and x + δx and two noiseless transistors of channel lengths x and L − x, respectively. c) Small-signal representation.

Acknowledgment: This work was supported in part by the German Federal Ministry of Education and Research “SOMOFLEX” under Grant 13FH015IX6 and in part by the German Research Foundation (DFG) under Grant KL 1042/9-2 (SPP FFlexCom). The authors would like to thank AdMOS GmbH for support.