Showing posts with label floating gate transistor. Show all posts
Showing posts with label floating gate transistor. Show all posts

May 25, 2020

[paper] Organic Transistor Memory Based on Black Phosphorus Quantum Dots

P. Kumari, J. Ko, V. R. Rao, S. Mhaisalkar and W. L. Leong
Non-Volatile Organic Transistor Memory Based on Black Phosphorus Quantum Dots as Charge Trapping Layer,
in IEEE Electron Device Letters, vol. 41, no. 6, pp. 852-855, June 2020
doi: 10.1109/LED.2020.2991157

Abstract: High performance organic nano-floating gate transistor memory (NFGTM) has important prerequisites of low processing temperature, solution–processable layers and charge trapping medium with high storage capacity. We demonstrate organic NFGTM using black phosphorus quantum dots (BPQDs) as a charge trapping medium by simple spin-coating and low processing temperature ( 120 °C). The BPQDs with diameter of 12.6 ± 1.5 nm and large quantum confined bandgap of ~2.9 eV possess good charge trapping ability. The organic memory device exhibits excellent memory performance with a large memory window of 61.3 V, write-read-erase-read cycling endurance of 10 3 for more than 180 cycles and reliable retention over 10,000 sec. In addition, we successfully improved the memory retention to ON/OFF current ratio 10E4 over 10,000 sec by introducing PMMA as the tunneling layer.
 
FIG: a.) Schematic of bottom gate top contact NFGTM device; b.) Band diagram explaining memory mechanism under positive gate bias 

Acknowledgement: W.L. Leong would like to acknowledge funding support from her NTU start-up grant (M4081866), Ministry of Education (MOE) under AcRF Tier 1 grant (2016-T1-002- 097), Tier 2 grant (2018-T2-1-075), ASTAR AME IAF-ICP Grant (No.I1801E0030) and A*STAR AME Young Individual Research Grant (Project No. A1784c019).