[virtual] ToM2020/2 Announcement

ToM2020/2 Course

September, 8th, 2020
    14.00-17.30    Danilo Gerna (Melexis Technologies), “Advanced Hall Element Based Magnetic Sensors Front End Design”

September, 9th, 2020
    9.00-12.30    Carlo Samori (Milan Politechnic), “PLL: From Analog to Digital and Recent Trends”
    14.00-17.30    Alex Tranca (Infineon), “Robust Design of Smart Power ICs for Automotive Applications, with Focus on Load Current Sensing”

September, 10th, 2020
    9.00-12.30    Alfio Dario Grasso (Univ. Catania), “Ultra-Low Power Amplifiers for IoT Nodes”
    14.00-17.30    Gabriella Ghidini (STMicroelectronics), “Dielectric Reliability in Microelectronics”

In this particular situation, the PhD School at University of Milan-Bicocca decided to fully support the costs of the ToM2020/2 course, whose participation will then be free-of-charge for the attendees. However, for proper managing internet access to the virtual ToM2020/2 course, registration is mandatory at the following website:
http://www.innotechevents.com/index.php?page=ToM/RegistrationForm.html

Only registered participants will receive access information for the course.
At the end of the course, an exam will be proposed for certifying the positive attendance (please register to the exam with the course registration).
We look forward to virtually meeting you !!!!

More information at:
http://www.innotechevents.com/index.php?page=ToM/ToM.html

H2020 Training Courses

H2020 Financial Management Training 18-20 Feb 2020 - Rome, Italy 03-05 Mar 2020 - Amsterdam, the Netherlands 28-30 April 2020 - Brussels, Belgium 16-18 Jun 2020 - Valletta, Malta Read More

H2020 Proposal Writing Training

29-30 Jan 2020 - Lisbon, Portugal 04-06 Feb 2020 - Vienna, Austria 10-12 Mar 2020 - Barcelona, Spain 12-14 May 2020 - Amsterdam, the Netherlands 09-11 June 2020 - Valletta, Malta

*Our H2020 Proposal Writing training will now be a 3 day event which will now include guidance & information on how the new Horizon Europe programme is shaping up to look like plus a day dedicated to the management of the Funding & Tenders Portal (SEDIA) Universities: Contact your international office for possible funding opportunities to attend our trainings under Erasmus +

Read More

All our H2020 trainings can be delivered in–house anywhere in Europe or around the world. Find out more here

Device to GDSII for IC Design Training

Hands on Training Program on “Device to GDSII for IC Design”

on 22-27 Feb 2016

Organized by VLSI Division of School of Electronics Engineering

Vellore Institute of Technology, Near Katpadi Rd Vellore, Tamil Nadu - 632014

The relentless march fast of the CMOS has slowed down and the semiconductor industry is looking for novel and innovative devices. Many novel devices are being explored currently. TCAD and Cadence tool allows us to generate new structures, circuits and analyze its performance. Unlike other circuit simulators, TCAD and Cadence needs a special training. This hands on training addresses this gap.

Target Audience: Faculty, students and research scholars from various engineering colleges of India. The number of participants is limited to 40. 

Topics to ďe addressed:

Using TCAD:

• Structure Creation, Simulation and Device Simulation 
• Process Simulation 
• Multi-gate Transistors 
• Radiation study on devices and circuits

Using Cadence: 

• RTL Design and Simulation 
• Synthesis and low power synthesis Using RTL Compiler 
• Physical aware synthesis and DFT 
• Block and Top Level P&R Using SOC Encounter 
• STA Using Timing Engine 

[read more...]

Wearable Sensing and Computing

 Wearable Sensing and Computing 

 05.11.2014 - 06.11.2014

 EPFL Lausanne (CH)

COURSE OBJECTIVES

The course main objective is to inform and discuss in great details the latest advancements in low power sensing technology, energy harvesting and their heterogeneous integration for wearable smart system applications. Technological roadmaps of performance and future evolutions will be presented. The low power wireless communications are discussed from the point of view of existing standards and challenges for reducing the energy per communicated bit. Another objective is to detail some key future applications for wearable sensing and computing with main emphasis on: (1) medical Diagnostics, monitoring and prevention and (2) sports, fitness and activity monitoring applications. We analyze the benefits of autonomous smart system technology from many different points of view, including that of the individual, the physician, health care management, and society in general. We provide a rationale on the role of such technology as a component of the care cycle and the changes it can induce by reinforcing preventive strategies.

AGENDA on-line
Day 1 (09:00 – 17:00):

• Introduction to wearable technology and energy efficient functions for autonomous smart systems
• Energy efficient computing technologies and their importance for wearable applications:
• Wearable low power sensor technology trends
• Wearable low power communications technologies
• Wearable energy harvesting technology trends

Day 2 (09:00 – 17:00):

• Heterogeneous integration: solutions, roadmaps and trends for wearables
• Context-driven embodiments by wearable systems and related applications and services
• Market Trends for Mobile and Wearable Technology
• Wearable autonomous smart systems: Applications to Medical Diagnostics, Monitoring and Prevention Paradigms using Feedback Loops
• Wearable Technology – Sports, Fitness and Activity Monitoring Applications

Course registration on-line

PhD course on Nano-scale MOS transistors

Semi-classical modeling and applications
Udine, May 28 - June 1, 2012

Luca Selmi, David Esseni, Pierpaolo Palestri
DIEGM, Università degli Studi di Udine

The course aims at giving a description (in terms accessible to both physicists and electronic engineers) of advanced models for modern nano-MOSFET architectures exploiting technology boosters (strain, high-k materials, etc.) for enhanced channel mobility and reduced leakage. The prerequisite knowledge in physics is limited to the basic concepts of classical electrostatics and electrodynamics and elementary notions of quantum mechanics.

All information dealing with the application for such a scholarship and the eligibility criteria can be found on
http://www.euro-dots.org/Students-rules.asp
and
http://www.euro-dots.org/Students-steps.asp

To register, please call +39 0432 558251 or e-mail it to palestri@uniud.it

DEADLINE FOR ADVANCED REGISTRATION: APRIL 28, 2012

IDESA Training Courses Calendar

Implementation of widespread IC DEsign Skills in advanced deep submicron technologies at European Academia.

Advanced Analog Implementation flow	Analog circuit design simulation and layout for 90nm and below.
Advanced Digital Physical Implementation flow	Power Aware physical design techniques, timing and power closure.
Advanced RF Implementation flow	RF Implementation Flow in deep sub-micron CMOS technology.
Design for Manufacturing flow	DFM issues are becoming increasingly important for 90nm and below.

The IDESA Course Booking System is managed and maintained by STFC Rutherford Appleton Laboratory, UK. If you have a booking enquiry, please email: idesa@stfc.ac.uk

	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
IDESA Course Calendar 2010
Advanced Analog Implementation flow									RAL
Advanced Digital Physical Implementation flow									AGH			LUND
Advanced RF Implementation flow											IMEC	PPAZ
Design for Manufacturing flow											ERLN
IDESA Course Calendar 2011
Advanced Digital Physical Implementation flow		ERLN
Design for Manufacturing flow		TUL				MONS

Course Location key:
AGH	AGH University of Science and Technology, Poland	CIME	CIME, France
ERLN	Fraunhofer IIS, Erlangen, Germany	IMEC	Interuniversitair Micro-Electronica Centrum, Belgium
LUND	University of Lund, Sweden	MONS	Université de Mons, Belgium
MONT	University Montpellier 2, France	NAP	Università degli Studi di Napoli Federico II
PPAZ	Péter Pázmány Catholic University, Hungary	RAL	Rutherford Appleton Laboratory, UK
STU	Slovak University of Technology in Bratislava, Slovakia	TUL	Technical University of Lodz, Poland