[paper] Topological Transistor Compact Model

Md. Mazharul Islam¹, Shamiul Alam¹, Md. Shafayat Hossain², Ahmedullah Aziz¹

Compact Model of a Topological Transistor

 IEEE Access; Feb.7, 2024

DOI: 10.1109/ACCESS.2024.3363645

1 Department of Electrical Engineering and Computer Science, The University of Tennessee, USA
2 Department of Physics, Princeton University, USA

Abstract: The precession of a ferromagnet leads to the injection of spin current and heat into an adjacent non-magnetic material. Besides, spin-orbit entanglement causes an additional charge current injection. Such a device has been recently proposed where a quantum-spin hall insulator (QSHI) in proximity to a ferromagnetic insulator (FI) and superconductor (SC) leads to the pumping of charge, spin, and heat. Here we build a circuit-compatible Verilog-A-based compact model for the QSHI-FI-SC device capable of generating two topologically robust modes enabling the device operation. Our model also captures the dependence on the ferromagnetic precision, drain voltage, and temperature with an excellent (>99%) accuracy.

FIG: (a) The proposed device structure. A QSHI in proximity with the FI with a monodomain magnetization m(t) that precesses at an angle θ. In proximity to the FI region there is a SC region The monodomain magnetization m(t) precesses at an angle θ around the axis perpendicular to the QSHI. The QSHI region injects charge, spin, and heat currents to the drain. The injection can be controlled by the applied potential at the FI region (Vg), the precession angle (θ), precession frequency (ω) temperature (T) and drain voltage (Vd ). Zero energy Majorana Fermion (MF) is harbored in the FI-SC interface that controls the pumped currents. (b) Circuit schematics for our simulation process. (c) Methodology flow for compact modeling

Acknowledgement: This work was supported by the Air Force Research Laboratory under Agreement FA8750-21-1-1018.

[paper] Compact Model for SIS Josephson Junctions

A Compact Model for Superconductor-Insulator-Superconductor (SIS) Josephson Junctions

Shamiul Alam, Mohammad Adnan Jahangir and Ahmedullah Aziz, Member, IEEE

Department of Electrical Engineering and Computer Science

University of Tennessee, Knoxville, TN, USA

in IEEE Electron Device Letters, 

DOI: 10.1109/LED.2020.3002448

Abstract: We present a Verilog-A based compact model for the superconductor-insulator-superconductor (SIS) Josephson junction. The model can generate both hysteretic and non-hysteretic current-voltage (I-V) response for the SIS junctions utilizing the Stewart-McCumber damping parameter. We calibrate our model with different SIS samples and demonstrate accurate matching between the simulated and experimental results. We implement temperature effect on the energy gap and the critical current of the superconductor to explore the dynamic trends in device characteristics. We calculate the junction inductance and stored energy as functions of junction current and temperature. We simulate the read/write operations of an SIS junction based cryogenic memory cell to illustrate the usability of our model.

Fig: (a) Device structure of an SIS Josephson junction
(b) the RCSJ model of a Josephson junction.