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Grabiński, Władysław, Daniel Tomaszewski, Laurent Lemaitre, and Andrzej Jakubowski

Standardization of the compact model coding: non-fully depleted SOI MOSFET example

Journal of Telecommunications and Information Technology (2005): 135-141.

Abstract - The initiative to standardize compact (SPICE-like) modelling has recently gained momentum in the semiconduc-tor industry. Some of the important issues of the compact modelling must be addressed, such as accuracy, testing, avail-ability, version control, verification and validation. Most com-pact models developed in the past did not account for these key issues which are of highest importance when introducing a new compact model to the semiconductor industry in par-ticular going beyond the ITRS roadmap technological 100 nm node. An important application for non-fully depleted SOI technology is high performance microprocessors, other high speed logic chips, as well as analogue RF circuits. The IC de-sign process requires a compact model that describes in detail the electrical characteristics of SOI MOSFET transistors. In this paper a non-fully depleted SOI MOSFET model and its Verilog-AMS description will be presented. 

Fig: Approximation of the distribution of currents components

in the non-fully depleted SOI MOSFET.  

Keywords: Verilog-AMS, compact model coding, SOI MOSFET.

References:

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