This Special Issue in IEEE Transactions on Electron Devices will be devoted to the research and development activities on emerging compact interconnection models for circuit simulation for the 65 nm technological dode and below.
Topics include compact models for RLCK interconnects, Cu/low-K technologies, Carbon nanotube interconnects and Graphene Nano-Ribbon interconnects, RF and Microwave, 2D/3D compact interconnect models, interconnect modeling for SoC design, interconnect variability and statistical modeling,...
The deadline for paper submission is January 16 2009.
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