MOS-AK INAOE Workshop on Semiconductor Technologies
Puebla (MX), May 14-16, 2025
Media Note
The MOS-AK Workshop on Semiconductor Technologies was held at the Instituto Nacional de Astrofísica, Óptica y Electrónica (INAOE) in Tonantzintla, Puebla, México, on May 14-16, 2025. This workshop was sponsored by MOS-AK, the INAOE, and IEEE through the Puebla Section and the local chapters for the Electron Devices and Instrumentation and Measurements societies. The MOS-AK event was inaugurated by Dr. Wladek Grabinski representing MOS-AK and IHP; Dr. David Sánchez, INAOE's General Director, Dr. Claudia Feregrino, Director of Research and Development for INAOE, and Dr. Roberto Murphy, the local organizer.
The objective of the workshop was to present the various open source tools for the design and simulation of integrated circuits (ICs). It consisted of in person as well as remote keynote speeches by experts in the field, and of a three-hour workshop on digital design synthesis.
The opening talk was by Dr. Wladek Grabinski (MOS-AK), covering a description of all the available FOSS CAD/EDA tools and programs for the design, simulation and fabrication of ICs using OpenPDK. This was a very enlightening run-through of the opportunities that can be exploited by all those who work in the field, at all levels.
It was followed by a conference by Dr. Joaquín Faneca Ruedas, from the Centro Nacional de Microelectrónica (CNM) in Barcelona, Spain. He spoke about silicon nitride photonics, which is fast becoming a scalable platform for integrated optics. We then had the pleasure of listening to Dr. Medhi Saligane talk on agent AI for analog layout generation. Dr. Saligane is now with Brown University in the US. The first day was closed by a talk on memristor modeling by Dr. Arturo Sarmiento from INAOE. Memristors are fast becoming a common element in IC design, and their modeling and eventual characterization has become a very important field of endeavor in recent years.
The second day was opened by Dr. Colin Shaw from Silvaco (US) who gave a deep description of the status of the Si2 Compact Model Coalition.
The rest of the morning was dedicated to a three-hour workshop on digital circuit synthesis using open source CAD/EDA design tools.
Friday's first talk was by Dr. Harriet Parnell, a senior academic engineer at Ansys, and who gave a talk describing Ansys Lumerical FDTD tool, with a case study of a nanohole array. This was followed by a description of logic technology device innovations, given by Dr. Carlos Díaz, the Senior Director for Research and Development for Taiwan Semiconductor Manufacturing Company (TSMC). This great talk was followed by a presentation of the MOSbius project given by Dr. Peter Kinget, the Bernard J. Lechner Professor of Electrical Engineering at Columbia University. The workshop was closed by a researcher at INAOE, Dr. Reydezel Torres, who spoke of the simulation of chip-to-chip interconnects, another very important aspect of semiconductor technology.
The MOS-AK INAOE workshop was attended by 86 participants, mostly undergrad students but also by professional academicians and scientists. We can call it a success, and we hope that it has contributed to the country's much-needed progress in integrated circuit design and technology.
-- R.Murphy and W.Grabinski
-- on the behalf of the MOS-AK INAOE Organizing Committee
RM/WG120625
