Sabitabrata Bhattacharya and Suman Lata Tripathi
Implementation of Low Power Inverter
using Si1‑xGex Pocket N & P‑Channel Junction‑Less Double Gate TFET
Silicon, Springer Nature B.V. 2021
Received: 19 October 2021 / Accepted: 16 December 2021
DOI: 10.1007/s12633-021-01628-w
* School of Electronics and Electrical Engineering, Lovely Professional University, Phagwara, Punjab, India
Abstract: In this paper tunnel field effect transistor is reintroduced as an efficient low power replacement of MOSFET. The main draw- backs of TFET devices, like low ON-state current and low ION/IOFF ratio, are removed by structural and material modifica- tions. The proposed device is named junction-less double gate TFET or JL DGTFET. The junction-less attribute is used to reduce fabrication complexity, double gate is used to have better control over channel conduction and enhance drive current, high k gate dielectric and high work function gate metal is used to increase ON current. Low band gap Si1-xGex pocket is used near source end of the device to further improve performance. Four-fold optimization of the device is done along with temperature analysis to propose the best possible structure and dimensions. The proposed junction-less DGTFET was found to show huge performance improvement in ION/IOFF (of the order of 1011) and short channel parameters (SS = 63.5 mV/dec- ade, DIBL = 22.2 mV/V) over existing TFET devices. Both N & P-channel of the device is implemented with the optimised values on 18 nm technology node. Finally, an inverter circuit using both the N & P-channel devices is implemented following the CMOS compatible structure, and it is found to give very good results at low power.
Fig: Design of inverter circuit using n-JL DGTFET and p- JL DGTFET
Acknowledgements: The authors acknowledge for the support and lab facility provided by department of VLSI design, School of Electronics and Electrical Engineering, Lovely Professional University, Punjab India.
