Open Senior Researcher Position in Compact Device Modeling

A Senior Researcher position is offered in the Department of The Electronic, Electrical and Automatic Control Engineering in the Universitat Rovira i Virgili (Tarragona, Spain). This position has a duration of 5 years, with chances of obtaining a tenure as Associate Professor. It is funded by the prestigeous "Ramón y Cajal Programme" from the Spanish Ministry of Science and Innovation.

The candidate should have a Ph D in Electrical Engineering, Electronic Engineering, Telecommunication Engineering, Physics, or related disciplines. At least three years of postdoctoral experience are needed.

The candidate should have enough research experience in the field of semiconductor devices, and must have a very good knowledge of the physics of electron devices. The research project to be carried out can be adapted to the candidate's profile, and it can be proposed by the candidate. In any case, it will be related to the National and European projects from which my group receives funding. Our contribution in these projects is the physics and modeling (in particular compact modeling) of the novel devices addressed by those projects: thin-film SOI and multi-gate MOSFETs (FinFETs, DG MOSFETs, Gate All-Around MOSFETs), High Voltage MOSFETs, advanced HEMTs and Organic Thin Film Transistors (OTFTs).

The net salary will be around 2200 Euro/month. The position will include a research grant that the successful candidate can use to fund the beginning of his/her research.

Tarragona is a small city (110000 inhabitants) on the Mediterranean coast, about 100 Km south from Barcelona, and very well connected to Barcelona and the main Spanish cities by rail and highway. Tarragona is a very old city, very important during the Roman Empire, and with a lot of historical landmarks.

The quality of life in Tarragona is excellent. Mediterranean and mild climate the whole year. Wonderful beaches around the city (even at the city). Mountains close to the city (even the Pyrenees are not far). Besides, the city is very quiet, but with an intense nightlife.

My research group in the Department of Electronic Engineering, Universitat Rovira i Virgili (URV) is one of the strongest groups in compact modeling in Europe. We are leading one European project on compact modeling (in which a total of 15 European universities and companies participate). We also participate on two other European projects (two about nanoscale MOSFETs and another one about organic Thin Film Transistors).


Interested applicants should send me their CV by e-mail.
DEADLINE TO RECEIVE APPLICATIONS: February 24 2010.

MY E-MAIL ADDRESS IS: benjamin.iniguez@gmail.com

Address:
Benjamin Iñiguez
Nanoelectronics and Photonics Systrems Group (NEPHOS)
Department of Electronic Engineering
Universitat Rovira i Virgili (URV)
Avinguda dels Paisos Catalans 26
43007 Tarragona
SPAIN.

[mos-ak] MOS-AK/GSA Workshop in Rome // 2nd announcement

Please visit the MOS-AK/Rome Workshop web site:
http://www.mos-ak.org/rome/

with updated:

* Speakers list:
http://www.mos-ak.org/rome/index.php#Speakers

* Free On-line Registration Form:
http://www.mos-ak.org/rome/index.php#Register

* Venue and Recommended Hotels:
http://www.mos-ak.org/rome/index.php#Venue

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Job offers at GLOBALFOUNDRIES Singapore

I post here a job offer I've found, because it may interest someone... 

If you wish to apply, you can go to the original website here. Good luck!!
 

 Senior Engineer

• Assist in the ESD and LU development support for various technology nodes
• The job scope will include extensive test chip design and layout, spice model development, circuit simulations, layout verification, design database preparation and documentation
• The job scope includes R&D on new and optimized ESD solutions from a foundry perspective
• In this position, the staff will be support cross functionally teams such as IO design and ESD library development
  Other responsibilities will include:
• Investigates and develops solution for highly complex circuit level ESD problems
• Learn and evolve in any other skills and tools required to achieve challenging ESD development goals including automation, and new research areas
• Publish in relevant peer reviewed journal and conferences
• Actively pursue patent development

Engineer

• The engineer will actively pursue ESD device development and assessment of ESD and LU performance of various technologies
• The responsibilities include device definition, characterization of the ESD devices using DC, pulsed and RF testers, latch up characterization, documentation and reporting, assist internal process owners for the ESD and LU rule definition
  Other responsibilities include:
• As required, explore the need to modify any given processes, procedures or methods to develop new solutions for the foundry and its customers
• Continuously research and potentially develop new test methods and charactersation approaches.
• Publish in relevant peer reviewed journal and conferences
• Actively pursue patent development

Requirements

• Phd or Masters Degree in Physics
• 2 to 5 years of relevant working experience

Senior Engineer

• Good and demonstrated knowledge in device layout, circuit design, custom layout, and IO design
• Well versed in circuit design and layout tools (such as those from cadence or Mentor)
• Analog circuit and RF design knowledge is a plus

Engineer

• Good knowledge of microelectronics and semiconductor device physics
• Demonstrated expertise and knowledge in ESD protection design and analysis using pulsed/ ESD testers, and device design
• Experience in HV device physics, compact model simulation, and product engineering is valuable
• Candidate is required to have exceptional technical skills combined with evidence of motivation to work in ESD and LU reliability area
• Open and willing to listen to internal and external customer concerns and willing to go an extra mile to help customers succeed in their efforts to achieve required ESD and LU performance targets
• Fluency in English language is a must, with good comprehension capability
• Ability to handle anyone with a pleasant attitude and willingness to share/mentor colleagues

DATE 2010 Advance Programme is Available

DATE10 Programme
Download Conference Programme (PDF - 3 MB)
Download Fringe Meetings Programme (PDF - Coming soon)

Event Overview

2010 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - Call For Papers

2010 BIPOLAR/BiCMOS CIRCUITS AND TECHNOLOGY MEETING
Austin, Texas, USA
http://www.ieee-bctm.org
Short Course: Monday October 4, 2010, Conference: Tuesday and Wednesday October 5-6, 2010
Modeling Workshop: Thursday October 7, 2010

The Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) is a forum for technical communication focused on the needs and interests of the bipolar and BiCMOS community. Papers covering the design, performance, fabrication, testing and application of bipolar and BiCMOS integrated circuits, bipolar phenomena, and discrete bipolar devices are solicited. All papers must be suitable for a twenty-minute presentation. Text and figures must not have been presented at other conferences or published in any scientific or technical publications prior
to BCTM.
Publication in the BCTM 2010 Proceedings does not preclude publication in an IEEE journal, and authors are encouraged to do so. A Special Issue of the IEEE Journal of Solid-State Circuits will include selected papers from BCTM 2010.

Papers are solicited in the following areas:
- ANALOG / DIGITAL CIRCUIT DESIGN
- RADIO FREQUENCY CIRCUIT DESIGN
- WIRELINE COMMUNICATIONS: LAN, WAN, FDDI
- DEVICE PHYSICS
- MODELING / SIMULATION- PROCESS TECHNOLOGY

STUDENT PAPERS ARE ENCOURAGED
If you know of people who may have a paper to contribute please bring this Call
for Papers to their attention.

IMPORTANT DEADLINES FOR AUTHORS
Monday, May 3, 2010 Deadline for receipt of abstract and summary
Friday, June 11, 2010 Notification of acceptance to be sent by email
Friday, July 23, 2010 Final proceedings manuscript due

SUBMISSION AND CONTACT INFORMATION
Visit the conference website: www.ieee-bctm.org, or contact:
Jan Jopke, Conference Manager, CCS Associates, 6611 Countryside Drive, Eden
Prairie, MN 55346, USA
TEL: 1-952-934-5082, FAX: 1-952-934-6741 E-mail: ccsevents@comcast.net.