The IEEE 2010 ICMTS (International Conference Microelectronic Test Structures) has launched the final call for papers (deadline: Sept. 18, 2009). Authors are asked to submit a two or three page extended abstract in PDF file format (font-embedded) including a 500- to 1500-word summary, major figures, and data for review. ICMTS'10 will be held between March 22 – 25, 2010, in Hiroshima (Japan), and there is a suggested topic including "Device and Circuit Modeling, Parameter Extraction RF device modeling".
I imagine that the developers of the well known HiSIM models, who work in the Hiroshima University, will be around, so this conference can be a bussiness oportunity for compact model developers and users, including circuit designers.
The conference will be preceded by a one-day Tutorial Short Course on Microelectronic Test Structures on March 22, 2010. There will be an equipment exhibition relating to test structure measurements. A Best Paper award will be presented by the Technical Program Committee.
ICMTS has always an excellent social programme. There is always a very interesting excursion tour, and a wonderful gala dinner. And the Hiroshima cuisine is delicious...
Aug 15, 2009
Aug 14, 2009
Compact Modeling Job Vacancy at TU Ilmenau, Germany
The RF & Nano Device group at TU Ilmenau is seeking a candidate for a position in the frame of a European Marie Curie Project.
The candidate will work on compact modeling of high-frequency transistors, in particular HEMTs (High Electron Mobility Transistor). During several months he or she will also work at a semiconductor foundry in the UK in the frame of a secondment agreement between the foundry and TU Ilmenau.
Contract details: Temporary contract to carry out a Ph D, starting date January 2010.
Application deadline: 31 October 2009.
Contact: PD Dr. Frank Schwierz, email: frank.schwierz@tu-ilmenau.de
Requirements: Candidates should be a Ph.D. student having already earned a Master or Dipl.-Ing. degree in electrical engineering, preferably in semiconductor electronics. Good skills in written and spoken English are mandatory.
Desirable is experience in the areas of semiconductor device physics and device modeling and simulation.
The candidate will work on compact modeling of high-frequency transistors, in particular HEMTs (High Electron Mobility Transistor). During several months he or she will also work at a semiconductor foundry in the UK in the frame of a secondment agreement between the foundry and TU Ilmenau.
Contract details: Temporary contract to carry out a Ph D, starting date January 2010.
Application deadline: 31 October 2009.
Contact: PD Dr. Frank Schwierz, email: frank.schwierz@tu-ilmenau.de
Requirements: Candidates should be a Ph.D. student having already earned a Master or Dipl.-Ing. degree in electrical engineering, preferably in semiconductor electronics. Good skills in written and spoken English are mandatory.
Desirable is experience in the areas of semiconductor device physics and device modeling and simulation.
Second International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation: Deadline extended
The Second International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation will be held at the University College London (UCL) in London (UK) on September 25 2009.
This workshop is intended to provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in collaboration with IEEE UCL-Cambridge University EDS/LEOS Chapter joint chapter that is in the process of formation. Topics include include:
• Physics of TFTs and operating principles
• Compact TFT device models for circuit simulation
• Model implementation and circuit analysis techniques
• Model parameter extraction techniques
• Applications of compact TFT models in emerging products
• Compact models for interconnects in active matrix flat panels
Prospective authors should submit a 500-word abstract to: m.bauza@ucl.ac.uk
THE ABSTRACT SUBMISSION DEADLINE IS AUGUST 18 2009.
HOWEVER, ABSTRACTS WILL BE CONSIDER EVEN AFTER THE OFFICIAL SUBMISSION DEADLINE.
If their abstract is accepted, the authors will be invited to submit of a 4-page paper to be included in proceedings. The deadline is September 14, 2009.
This is the only workshop especifically devoted to the compact modeling of TFT!
This workshop is intended to provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in collaboration with IEEE UCL-Cambridge University EDS/LEOS Chapter joint chapter that is in the process of formation. Topics include include:
• Physics of TFTs and operating principles
• Compact TFT device models for circuit simulation
• Model implementation and circuit analysis techniques
• Model parameter extraction techniques
• Applications of compact TFT models in emerging products
• Compact models for interconnects in active matrix flat panels
Prospective authors should submit a 500-word abstract to: m.bauza@ucl.ac.uk
THE ABSTRACT SUBMISSION DEADLINE IS AUGUST 18 2009.
HOWEVER, ABSTRACTS WILL BE CONSIDER EVEN AFTER THE OFFICIAL SUBMISSION DEADLINE.
If their abstract is accepted, the authors will be invited to submit of a 4-page paper to be included in proceedings. The deadline is September 14, 2009.
This is the only workshop especifically devoted to the compact modeling of TFT!
Aug 10, 2009
Aug 4, 2009
Q2 semiconductor sales up 17%, industry is 'returning to normal seasonal growth patterns,' SIA reports
I copy here an article originally published in EDN:(I mean, finally good news!)
Focused supply chain management by both producers and customers helped to moderate the impact of the global economic recession on the industry, SIA reports.
“The fourth-consecutive monthly increase in sales is one indicator the industry is returning to normal seasonal growth patterns,” said SIA President George Scalise in a statement.
Focused supply chain management by both producers and customers helped to moderate the impact of the global economic recession on the industry, SIA reports.
By Suzanne Deffree, Managing Editor, News -- Electronic News, 8/3/2009
Although sales numbers were a mixed bag of results, the SIA (Semiconductor Industry Association) this morning reported on Q2, June, and first half revenue with palatable optimism for a semiconductor industry recovery.
Q2 recorded a sequential worldwide sales increase of 17% and a 20% year-over-year decline for the quarter. Q2 sales of $51.7 billion were capped off by month of June sales at $17.2 billion, an increase of 3.7% from May when sales were $16.6 billion, but 20% lower than the $21.6 billion reported for June 2008.
While June continued a month-over-month sales growth trend that began in March when sales inched up 3.3% on February's numbers, total 2009 first half sales of $95.9 billion were still 25% below the first six months of 2008, when sales were $127.5 billion, SIA data showed.
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Scalise said focused supply chain management by both producers and customers helped to moderate the impact of the global economic recession on the industry. “Inventories have been closely managed, encouraging us to believe that the sequential increase in quarterly sales represents a gradual recovery of demand,” he said.
Scalise and the SIA aren't the only optimistic parties in the semiconductor industry. Several industry analysts and market research companies including Gartner and iSuppli have recently become more positive in their forecasts for key demand drivers.
“Consensus estimates for unit sales of PCs are now in the range of minus 5% to flat compared to 2008, whereas earlier forecasts were projecting year-on-year unit declines of 9 to 12%," Scalise noted. "In cell phone handsets, analysts now believe the unit decline will be in the range of 7 to 9% compared to earlier forecasts of a decline of around 15%. PCs and cell phones account for nearly 60% of worldwide semiconductor consumption."
SIA credited economic stimulus programs in China, including incentives for purchasing consumer products and investment in 3G/TDSCDMA communications infrastructure, as having helped drive semiconductor sales in the world’s largest chip market.
“The global macroeconomic environment remains the key factor in determining the timing and rate of recovery for the semiconductor industry,” Scalise concluded.
According to SIA data, sales in the Asia Pacific were up 23.2% in Q2 on a sequential basis. Q2 sales in the Americas were up 11.8% sequentially, while sales in Japan were up 17.9% and sales in Europe were up 0.5%.
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