MIGAS'08 Summer School

The 11 session of the MIGAS Summer School (International Summer School on Advanced Microelectronics) will be dedicated to Nanoscale CMOS and Si-Based Beyond CMOS Nanodevices.

MIGAS 2008 will take place in Autrans (French Alps) from June 28 to July 4 2008.

MIGAS is addressed to PhD students, engineers and researchers coming both from the university and from industry of the semiconductors.

The attendees will be able to improve their knowledge on nanoelectronic devices by means a set of lectures conducted by top international scientists.

The scienfific programme will consists of the following lectures:

1) Advanced materials, technology and characterization methods for nanoscale CMOS - Strained SOI materials for high performance MOSFETs, C. Mazuré, SOITEC - Advanced global strain-tuning platforms, M. Myronov, The University of Warwick - High k dielectrics and metal gates, O. Engstrom, Chalmers University - Schottky source-drain contacts, E. Dubois, IEMN - Emerging nanotechnologies, T. Baron, LTM - New characterization methods for nanoMOSFETs, G. Ghibaudo, IMEP-LAHC 2) Novel CMOS architectures - Multi-gate and multi-channel MOSFETs, T. Ernst , Leti - Silicon-On-Nothing nanodevices, T. Skotnicki, STMicroelectronics - Ge channel MOSFETs, G. Eneman, IMEC - III-V channel MOS transistors, A. Dimoulas, Demokritos 3) Beyond-CMOS Nanodevices - Small slope Switches, A. Ionescu, EPFL - Nanowires, J.P. Raskin, UCL - Carbon electronics, J. Xu, Brown University 4) Innovative Memories - Non-volatile memories, L. Baldi, Numonyx - Advanced DRAM, M. Golbach, Qimonda - Emerging memories, H.-S. Ph. Wong, Stanford University

Besides, MIGAS includes a great social programme, with activities such as excursions the day before the beginning of the school, wine tastings, and copious dinners based on the excellent Dauphinoise and Vercors cuisine, and with great wines. Of course, the area around Autrans offers excellent opportunities for hiking, mountaineering, mountain-biking, lake swimming and more.

Registration includes accomodation in the resort as well as all meals.

TFT Symposium in the ECS Meeting in Hawaii

The 214th Electrochemical Society (ECS) Meeting will be held in Honolulu, Hawaii, on October 12-17 2008, in the Hilton Hawaiian Village.

The ECS Meeting includes a number of Symposia.

For the TFT community, I want to highlight the TFT 10 Symposium.

The TFT symposium is an intersting forum for the presentation and discussion of
the latest developments in all types of thin film transistors (TFTs) and
related fields. This symposium is chaired by Prof Yue Kuo (Texas A&M University)

Papers can deal with all aspects of fabrication processes, materials, device
physics, characterization, structures, and applications of TFTs. This TFT symposium will address the following topics:
(1.) new TFT Structures; (2.) novel or new processes; (3.) organic, inorganic, oxide, etc. thin film materials; (4.) device physics, modeling, characterization, and reliability; (5.) applications in LCDs, imagers, sensors, biochips, MEMS, etc.; (6.) applications in circuits; and (7.) integration of TFTsto large area displays, VLSIC, and other complex systems.


Abstracts should be submitted electronically to ECS headquarters by May 30.

Being this TFT Symposium in Hawaii, no doubt it will be a big success!

SINANO Device Modeling Summer School

The Third SINANO Device Modeling Summer School will be held in the historic Bertinoro Castle (Bertinoro (FC), Italy) on September 1-5 2008.

The SINANO Summer School was held in 2005 and 2006 in the framework of the former SINANO European Network of Excellence, and is currently continued under the umbrella of the new NANOSIL Network of Excellence and of the Integrated Project PULLNANO.

The goal of the SINANO Summer School is to increase the knowledge of PhD students and postdoctoral researchers in the fields of advanced modeling, simulation and characterization techniques for conventional and nanoscale CMOS devices. The lectures use to address topics such as device physics, device models, numerical techniques, device simulation tools, and experimental characterization techniques.

The 5 days program of the School will be dedicated to the following topics:

• Prospects for further development of CMOS technology

• Transport models for device simulation

• Experimental electrical device characterization

• Analytical and compact models

• Post CMOS devices

• Silicon technology for photo-voltaic energy conversion

These lectures will be conducted by very prestigeous professors and researchers.
Regarding the topic of "Analytical and compact models", Dr Raphaël Clerc (IMEP, France), will talk about “Device technology oriented analytical models”
Peter Baumgartner (Infineon) will give a lecture entitled: “RF and noise characterization of transistors and circuits”
Prof Paolo Pavan will talk about “Current trends in non-volatile memories”

Besides, there will also be a great social program which will include dinners, hiking and other outdoor activities..

The registration form should be sent before July 30.

Article in EDN: Modeling gaps in state-of-the-art mixed-signal SOC design

I've recently found an old (2006) paper on the EDN: Electronics Design, Strategy, News website. (I cannot reproduce it here because of the copyrights).

They discuss a bit about standardization efforts on Compact Modeling, and the different aspects that must be taken into account. I think it is a nice paper, even though it is slightly biased towards BSIM (only a bit: PSP, EKV and HiSIM are also mentioned... but not so extensively....).

Papers in Volume 52, Issue 5, Pages 597-838 (May 2008) of Solid-State Electronics

It seems that this month's harvest has been quite good. There are some quite interesting papers

Low-frequency noise properties of double channel AlGaN/GaN HEMTs
S.K. Jha, C. Surya, K.J. Chen, K.M. Lau and E. Jelencovic

A fully 2-dimensional, quantum mechanical calculation of short-channel and drain induced barrier lowering effects in HEMTs
G. Krokidis, J.P. Xanthakis and N.K. Uzunoglu

Subthreshold characteristics of polysilicon TFTs
Wanling Deng, Xueren Zheng, Rongsheng Chen and Yuan Liu

Physics-based 1/f noise model for MOSFETs with nitrided high-κ gate dielectrics
Tanvir Hasan Morshed, Siva Prasad Devireddy, Zeynep Çelik-Butler, Ajit Shanware, Keith Green, J.J. Chambers, M.R. Visokay and Luigi Colombo

Modeling non-quasi-static effects in channel thermal noise and induced-gate noise in MOS field-effect transistors
Abhay Deshpande and R.P. Jinda

Mobility model for compact device modeling of OTFTs made with different materials
M. Estrada, I. Mejía, A. Cerdeira, J. Pallares, L.F. Marsal and B. Iñiguez

Hot-carrier effects as a function of silicon film thickness in nanometer-scale SOI pMOSFETs
Sung Jun Jang, Dae Hyun Ka, Chong Gun Yu, Won-Ju Cho and Jong Tae Park

Modeling of potentials and threshold voltage for symmetric doped double-gate MOSFETs
A. Cerdeira, O. Moldovan, B. Iñiguez and M. Estrada