Showing posts with label
Integrated circuit modeling
.
Show all posts
Showing posts with label
Integrated circuit modeling
.
Show all posts
Feb 9, 2021
[paper] On-Chip Coplanar Waveguides
›
José Valdés-Rayón, Roberto S. Murphy-Arteaga and Reydezel Torres-Torres; Determination of the Contribution of the Ground-Shield Losses to ...
May 25, 2020
[paper] SPICE PCM Model
›
A SPICE Model of Phase Change Memory for Neuromorphic Circuits Xuhui Chen 1 , Huifang Hu 1 , Xiaoqing Huang 1 , Weiran Cai 2 , Ming Liu 3...
Feb 7, 2017
[paper] Statistical model of the NBTI-induced ΔVth, ΔSS, and Δgm degradations in advanced pFinFETs
›
Statistical model of the NBTI induced threshold voltage, subthreshold swing, and transconductance degradations in advanced pFinFETs J. Fra...
Dec 13, 2016
[paper] A surface potential large signal model for AlGaN/GaN HEMTs
›
A surface potential large signal model for AlGaN/GaN HEMTs Q. Wu, Y. Xu, Z. Wen, Y. Wang and R. Xu 2016 11th EuMIC, London, UK, 2016, p...
Aug 6, 2015
Best Practices for Compact Modeling in Verilog-A
›
Mcandrew, C.C.; Coram, G.J.; Gullapalli, K.K.; Jones, J.R.; Nagel, L.; Roy, A.S.; Roychowdhury, J.; Scholten, A.J.; Smit, G.D.J.; Wang, X.; ...
›
Home
View web version