Nov 26, 2024

[paper] Roadmap for Schottky Barrier Transistors

Eva Bestelink1*, Giulio Galderisi2, Patryk Golec1, Yi Han3, Benjamin Iniguez4, Alexander Kloes5, Joachim Knoch6, Hiroyuki Matsui7, Thomas Mikolajick2,8, Kham M. Niang9, Benjamin Richstein6, Mike Schwarz5, Masiar Sistani10, Radu A. Sporea1, Jens Trommer2, Walter M. Weber10,
Qing-Tai Zhao3 and Laurie E. Calvet11
Roadmap for Schottky Barrier Transistors
IOP Nano Futures in press (2024)
DOI: 10.1088/2399-1984/ad92d1

1 Advanced Technology Institute, University of Surrey, Guildford, UK
2 Namlab gGmbH, Nöthnitzer Str. 64a, 01187 Dresden, Germany
3 Peter Grünberg Institute, Forschungszentrum Jülich, 52428 Jülich, Germany
4 DEEEA, Universitat Rovira I Virgili, Tarragona, Spain,
5 NanoP, THM University of Applied Sciences, 35390 Giessen, Germany,
6 Institute of Semiconductor Electronics, RWTH Aachen University, Germany
7 Research Center for Organic Electronics (ROEL), Yamagata University, Japan
8 Chair for Nanoelectronics, TU Dresden, Germany
9 Electrical Engineering, Cambridge University, UK
10 Institute of Solid State Electronics, TU Wien, Vienna, Austria
11 LPICM, CNRS-Ecole Polytechnique, IPP, 91120 Palaiseau, France


Abstract: In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier, as an asset for device functionality. We discuss source gated transistors, which allow for excellent electronic characteristics for low power, low frequency environmentally friendly circuits. Also considered are reconfigurable field effect transistors, where the presence of two or more independent gate electrodes can be used to program different functionalities at the device level, providing an important option for ultrasecure embedded devices. Both types of transistors can be used for neuromorphic systems, notably by combining them with ferroelectric Schottky barrier transistors, which enable a large number of analog states. At cryogenic temperatures, SB transistors can advantageously serve for the control electronics in quantum computing devices. If the source/drain of the metallic contact becomes superconducting, Josephson junctions with a tunable phase can be realized for scalable quantum computing applications. Developing applications using Schottky barrier devices requires physicsbased and compact models that can be used for circuit simulations, which are also discussed. The roadmap reveals that the main challenges for these technologies are improving processing, access to industrial technologies and modeling tools for circuit simulations.

Fig: Illustration of the different applications of the SB Devices

Aknowleegements: RAS and EB acknowledge support from the Engineering and Physical Sciences Research Council (EPSRC) under Grants EP/V002759/1, EP/R028559/1, and EP/R511791/1, and from the Royal Society of Great Britain under Grants IES\R2\202056, IES\R3\193072, IEC\R3\183042, and IES\R3\170059. JT and GG are supported from the European Union’s Horizon Europe research and innovation programme under grant agreement No 101135316, SENSOTERIC. LEC and BI are supported from the European Union’s Horizon Europe research and innovation program under grant agreement No 101099555, BAYFLEX. Q-T Zhao, Y. Han, B. Richstein and J. Knoch gratefully acknowledge support from Deutsche Forschungsgemeinschaft under grant nos. KN 545/28, KN 545/29, and ZH-639/3. Q-T Zhao acknowledges partially support by the German BMBF project “NeuroTEC” (16ME0398K). KMN acknowledges support from the Engineering and Physical Sciences Research Council (EPSRC) under Grants EP/M013650/1 and EP/W009757/1. LEC acknowledges funding from the ANR under contract ANR-21-FAI1-0006-01.




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