[paper] Verilog-A Compact MTJ Model

Etienne Becle, Philippe Talatchian, Guillaume Prenat, Lorena Anghel, Ioan-Lucian Prejbeanu 

Fast Behavioral VerilogA Compact Model for Stochastic MTJ  

51st European Solid-State Device Research Conference; Grenoble 2021

  

CEA-Spintec (F)

Abstract: Spin-Transfer Torque Magnetic Tunnel Junctions (STT-MTJ) are devices featuring stochastic properties. They are promising candidates for non-volatile memory or true random number generators. To design reliable hybrid CMOS circuits including STT-MTJs, one needs to use a compact model accounting for its stochasticity in the circuit simulations. This paper proposes a compact model that accurately mimics the MTJ stochastic switching behavior and meets the needs of fast execution time. The relevance of such a model together with its fast execution velocity are illustrated with a bitstream generator. 

Fig: Schematic representation of the implemented algorithm

Acknowledgement: This work is supported by the French National Research Agency in the framework of the "Investissements d’avenir” program (ANR-15-IDEX-02).