#paper J. Trommer, M. Simon, S. Slesazeck, W. M. Weber and T. Mikolajick, "Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs," ESSDERC 2019, Krakow, 10.1109/ESSDERC.2019.8901730 https://t.co/xGNhchlT24 https://t.co/RpSsxIkfe8

#paper J. Trommer, M. Simon, S. Slesazeck, W. M. Weber and T. Mikolajick, "Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs," ESSDERC 2019, Krakow, 10.1109/ESSDERC.2019.8901730 https://t.co/xGNhchlT24 pic.twitter.com/RpSsxIkfe8

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November 19, 2019 at 05:51PM
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