Sedemos News
Sep 29, 2025

[Thesis] Verilog-A MOSFET Model for Analog IC Design

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Verilog-A Based Implementation of a MOSFET Model for Analog Integrated Circuit Design Master Thesis by Alba Gallego Velázquez Defended: July...

[paper] Gate stack engineering of 2D transistors

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Yeon Ho Kim, Donghun Lee, Woong Huh, Jaeho Lee, Donghyun Lee,  Gunuk Wang, Jaehyun Park, Daewon Ha and Chul-Ho Lee* Gate stack engineering o...
Sep 13, 2025

[Online Publications] 22nd MOS-AK/ESSERC Workshop in Munich (D) on Sept. 8 2025

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Arbeitskreis Modellierung von Systemen und Parameterextraktion Modeling of Systems and Parameter Extraction Working Group MOS-AK/ESSERC Work...
Sep 12, 2025

[paper] MicroLEDs SPICE Model

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Sultan El Badaoui1,2, Patrick Le Maitre1, Anthony Cibié1, Julia Simon1, Aurélien Lardeau-Falcy1,  Jeremy Bilde1, Louwenn Cherruault1, Manon ...
Sep 5, 2025

[Conference] 33rd Austrochip 2025

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Austrochip 2025 33rd Austrian Workshop on Microelectronics September 25, 2025 – Linz, Austria The  TT workshop  program Conference Program 0...
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