Showing posts with label verilog-a. Show all posts
Showing posts with label verilog-a. Show all posts
Dec 9, 2024

[Program Highlights] 17th International MOS-AK Workshop Silicon Valley, December 11, 2024

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  17th International MOS-AK Workshop Silicon Valley, December 11, 2024 Final MOS-AK Workshop Program The 1...
Oct 28, 2024

[paper] FOSS support for CM with Verilog-A

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Bűrmen, Árpád, Tadej Tuma, Iztok Fajfar, Janez Puhan, Žiga Rojec, Matevž Kunaver and Sašo Tomažič Free software support for compact modellin...
Feb 28, 2024

[FOSSDEM 2024] Open PDK Initiative

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FOSDEM 2024 was a two-day event organized by volunteers to promote the widespread use of free and open source software. Took place at the U...
Oct 27, 2023

[paper] STT-MTJ Device Model

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Haoyan Liu and Takashi Ohsawa General-Purpose STT-MTJ Device Model Based on the Fokker-Planck Equation IEEE Transactions On Nanotechnolo...
Oct 23, 2023

[paper] Lorentzian noise spectra in compact models

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Nikolaos Makris*†, Loukas Chevas* and Matthias Bucher* Verilog-A based implementation of Lorentzian noise spectra in compact models 26t...
Aug 14, 2023

[11k online viewers] 7th Sino MOS-AK/Nanjing

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Arbeitskreis Modellierung von Systemen und Parameterextraktion Modeling of Systems and Parameter Extraction Working Group 7th Sino MOS-AK Wo...
Aug 10, 2023

[paper] 5-DC-parameter MOSFET model

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Deni Germano Alves Neto1, Cristina Missel Adornes1, Gabriel Maranhao1, Mohamed Khalil Bouchoucha2,3, Manuel J. Barragan3, Andreia Cathelin2...
Mar 22, 2023

[analog-wg] Video of March 21 AWG Meeting

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The Analog Workgroup ( AWG ) was formed by the CHIPS Alliance TSC to explore collaborations in open source Analog/Mixed-Signal design and ...
Feb 13, 2023

FOSS Verilog-A Models Repository

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Dietmar Warning, ngspice team, has announced his new github project VA-Models repository   <https://github.com/dwarning/VA-Models> Th...
Jan 30, 2023

[paper] Zener diode compact modeling and simulation

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Mike Brinson Modelling and simulation of Zener diode noise in the time domain International Journal of Numerical Modelling Electronic Networ...
Dec 20, 2022

[OpenVAF] Next-Generation Verilog-A Compiler

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OpenVAF is a Next-Generation Verilog-A compiler that empowers the open source silicon revolution Roadmap:  OpenVAF is still in development ...
May 17, 2022

[mos-ak] [2nd Announcement and C4P] 4th International MOS-AK/LAEDC Workshop July 3 Puebla (MX)

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2nd Announcement and C4P Together with local online host, the LAEDC Organizers as well as all the Extended MOS-AK TPC Committee, would lik...
Apr 26, 2022

[paper] DL Physics-Driven MOSFET Modeling

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Ming-Yen Kao, H. Kam, and Chenming Hu, Life Fellow, IEEE Deep-Learning-Assisted Physics-Driven MOSFET Current-Voltage Modeling in IEEE Elect...
Apr 6, 2022

[paper] Compact Model of JLNGAA MOSFET in Verilog-A

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Billel Smaani 1,2 , Shiromani Balmukund Rahi 3 and Samir Labiod 4 Analytical Compact Model of Nanowire Junctionless Gate-All-Around MOSFET ...
Dec 8, 2021

Guardian of Verilog-A Compact Models

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on 02/02/2020, Geoffrey Coram, Staff CAD Engineer at Analog Devices and Verilog-A Recommended Practices CMC Chair was honored by Prof. Chen...
Nov 15, 2021

[paper] Verilog-A Compact MTJ Model

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Etienne Becle, Philippe Talatchian, Guillaume Prenat, Lorena Anghel, Ioan-Lucian Prejbeanu  Fast Behavioral VerilogA Compact Model for Stoch...
Sep 20, 2021

[paper] Compact Modeling of pH-Sensitive FETs Based on 2D Semiconductors

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Tarek El Grour, Francisco Pasadas, Alberto Medina-Rull, Montassar Najari, Enrique G. Marin, Alejandro Toral-Lopez, Francisco G. Ruiz, Andrés...
Jun 7, 2021

[paper] JART VCM v1 Verilog-A Compact

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JART VCM v1 Verilog-A Compact Model User Guide Christopher Bengel, David Kaihua Zhang, Rainer Waser, Stephan Menzel Electronic Materials Res...
May 3, 2021

[paper] FET Library for VLSI

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Taehak Kim 1 , Jaehoon Jeong 2 , Seungmin Woo 2 , Jeonggyu Yang 1 , Hyunwoo Kim 2 Ahyeon Nam 2 , Changdong Lee 2 , Jinmin Seo 2 , Minji Kim...
Apr 30, 2021

[paper] Dynamic Simulation of a-IGZO TFT Circuits Using AFCM

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Y. Hernández-Barrios 1 , J. N. Gaspar-Angeles 1 , M. Estrada 1 , B. Íñiguez 2 , And A. Cerdeira 1 Dynamic Simulation of a-IGZO TFT Circuits ...