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Showing posts with label tunnel FET. Show all posts
Showing posts with label tunnel FET. Show all posts
Jan 31, 2022

[paper] Implementation of Low Power Inverter using JL DG TFET

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Sabitabrata Bhattacharya and Suman Lata Tripathi Implementation of Low Power Inverter  using Si1‑xGex Pocket N & P‑Channel Junction‑Less...
Aug 17, 2020

[paper] SPICE model of p‐Si TFET

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Sola Woo Juhee Jeon Sangsig Kim  A SPICE model of p‐channel silicon tunneling field‐effect transistors for logic applications IJNM: 06 Aug...
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