Showing posts with label
tunnel FET logic gate
.
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Showing posts with label
tunnel FET logic gate
.
Show all posts
Aug 17, 2020
[paper] SPICE model of p‐Si TFET
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Sola Woo Juhee Jeon Sangsig Kim A SPICE model of p‐channel silicon tunneling field‐effect transistors for logic applications IJNM: 06 Aug...
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