Showing posts with label
trapped interface
.
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Showing posts with label
trapped interface
.
Show all posts
Mar 2, 2022
[paper] SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology
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Tianshi Liu 1 , Hua Zhang 1 , Sundar Babu Isukapati 2 , Emran Ashik 3 , Adam J. Morgan 2 , Bongmook Lee 3 , Woongje Sung 2 , Ayman Fayed 1 ,...
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