Showing posts with label ngspice. Show all posts
Showing posts with label ngspice. Show all posts
May 11, 2023

OpenPDK Networking Workshop

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OpenPDK, OpenTooling and Open Source Design An Initiative to Push Development Date: Networking Workshop FMD-QNC on 27-28 June 2023 Location...
Feb 13, 2023

FOSS Verilog-A Models Repository

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Dietmar Warning, ngspice team, has announced his new github project VA-Models repository   <https://github.com/dwarning/VA-Models> Th...
Jan 30, 2023

[paper] Zener diode compact modeling and simulation

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Mike Brinson Modelling and simulation of Zener diode noise in the time domain International Journal of Numerical Modelling Electronic Networ...
Jul 8, 2021

[paper] eSim: An Open Source EDA Tool

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Rahul Paknikar, Saurabh Bansode, Gloria Nandihal, Madhav P. Desai, Kannan M. Moudgalya,  and Ashutosh Jha* eSim: An Open Source EDA Tool for...
May 25, 2021

Circuit Design and Simulation Marathon using eSIM

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  Indian Institute of Technology, Bombay We are happy to announce the first ever #Circuit #Design and #Simulation #Marathon using #eSim! Thi...
Jan 20, 2020

Qucs-S as R&D design software

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Qucs-S  is not a simple circuit simulator, but also a research software. Please cite your R&D articles, if you are using Qucs-S in you...
Feb 3, 2019

GnuCap and ngspice at 2019 FOSDEM DevRoom CAD and Open Hardware

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Today at #FOSDEM : Felix Salfelder presenting " #Gnucap -- The GNU circuit analysis package Architecture, Algorithms and Applications...
Nov 26, 2017

[paper] Recent Developments in Qucs-S Equation-Defined Modelling of Semiconductor Devices and IC’s

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Recent Developments in Qucs-S Equation-Defined Modelling of Semiconductor Devices and IC’s Mike Brinson, and Vadim Kuznetsov Internatio...
Aug 23, 2017

Modeling and simulation of biological systems using SPICE language

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Morgan Madec 1 , Christophe Lallement 1 , Jacques Haiech 2 1 ICube, UMR7357, CNRS / Université de Strasbourg, France 2 LIT, UMR 7200, C...
Feb 28, 2017

[ngspice] FM Bugger Circuit

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Project Summary by https://www.eeweb.com The project circuit design is a FM Bugger circuit. It works like a transmitter that transmits and...
Feb 16, 2017

HiSIM-HV and HiSIM2 implemented into ngspice

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ngspice (Open Source SPICE Circuit Simulator) supports latest versions of HiSIM_HV and HiSIM2 [ read more... ] REF:  [1] HiSIM 2. Y. ...
Oct 14, 2016

FOSDEM 2017 EDA Devroom Call for Participation

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FOSDEM 2017 Electronic Design Automation Devroom Call for Participation This is the call for participation in the FOSDEM 2017 devroom on...
Oct 29, 2015

[Call for Participation] FOSDEM 2016 Electronic Design Automation Devroom

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 Call for Participation  FOSDEM 2016 Electronic Design Automation Devroom  This is the call for participation in the FOSDEM 2016 de...
Nov 10, 2014

i-MOS version 201410 release

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  New release of the interactive Modeling and On-line Simulation Platform ( i-MOS ), version 201410 has been released. In this release we ha...
Jul 16, 2014

[SISPAD] Compact Modeling Worksops - Enabling Better Insight of Device Features - Monday, September 8, 2014

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 SISPAD Compact Modeling Workshop   Enabling Better Insight of Device Features    Monday, September 8, 2014  Workshop Program 09:...