Showing posts with label memory. Show all posts
Showing posts with label memory. Show all posts
Jan 30, 2023

[paper] ULTRARAM Memory on Silicon

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Peter D. Hodgson, Dominic Lane, Peter J. Carrington, Evangelia Delli,  Richard Beanland and Manus Hayne ULTRARAM: A Low-Energy, High-Enduran...
Mar 18, 2022

[paper] Compound-Semiconductor Memory on Silicon

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Peter D. Hodgson, Dominic Lane, Peter J. Carrington, Evangelia Delli, Richard Beanland, and Manus Hayne ULTRARAM: A Low-Energy, High-Enduran...
Jan 5, 2022

[paper] A Review of Sharp-Switching Band-Modulation Devices

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Sorin Cristoloveanu 1 , Joris Lacord 2 , Sébastien Martinie 2 , Carlos Navarro 3 , Francisco Gamiz 3 , Jing Wan 4 , Hassan El Dirani 1 , Kyu...
Oct 20, 2021

[paper] CMOS floating-gate device for quantum control hardware

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Michele Castriotta 1 , Enrico Prati 2 , Giorgio Ferrari 1 Cryogenic characterization and modeling of a CMOS floating-gate device  for quantu...
May 12, 2021

4th International DevIC 2021 Conference

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DevIC 2021 Conference Date:  19-20 May, 2021 (New date after Postponement due to COVID-19 and W.B. State General Election) Click here to dow...
Oct 26, 2020

[paper] 2D-SFET Based SRAMs

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Niharika Thakuria, Graduate Student Member, IEEE, Daniel Schulman, Member, IEEE, Saptarshi Das, Member, IEEE, and Sumeet Kumar Gupta, Member...
Sep 17, 2020

[paper] Low-voltage, Non-volatile, Compound-semiconductor Memory Cell

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Room-temperature Operation of Low-voltage, Non-volatile, Compound-semiconductor Memory Cell Ofogh Tizno, Andrew R. J. Marshall, Natalia Fern...
Jun 24, 2020

[paper] SPICE Model for Bipolar Resistive Switching Devices

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Miranda, Enrique, and Jordi Suñé Departament d’Enginyeria Electrònica, UAB, 08193 Barcelona, Spain Fundamentals and SPICE Implement...