Showing posts with label
Voltage
.
Show all posts
Showing posts with label
Voltage
.
Show all posts
Jun 16, 2026
[paper] 130-nm CMOS tunnel p-bit cell
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Ju-Young Yoon, Nuno Caçoilo, Advait Madhavan, Jabez J. McClelland, Shun Kanai, Hideo Ohno, Shunsuke Fukami, and William A. Borders, "1...
Jan 8, 2024
[paper] Polylogarithms in MOSFET Modeling
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A. Ortiz-Conde and F. J. García-Sánchez Recent Applications of Polylogarithms in MOSFET Modeling 2023 IEEE 33rd International Conference on ...
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